>-----Original Message-----
>From: Stephen Hemminger <step...@networkplumber.org>
>Sent: Wednesday, October 4, 2023 12:29 AM
>To: Tomasz Duszynski <tduszyn...@marvell.com>
>Cc: dev@dpdk.org; Jakub Palider <jpali...@marvell.com>; Anatoly Burakov
><anatoly.bura...@intel.com>; Jerin Jacob Kollanukkaran <jer...@marvell.com>;
>tho...@monjalon.net
>Subject: [EXT] Re: [PATCH 1/2] raw/cnxk_gpio: support multi-process mode
>
>External Email
>
>----------------------------------------------------------------------
>On Tue, 3 Oct 2023 22:46:02 +0200
>Tomasz Duszynski <tduszyn...@marvell.com> wrote:
>
>> +
>> +struct cnxk_gpio_params {
>> + char allowlist[CNXK_GPIO_BUFSZ];
>> + int num;
>> +};
>
>Should be using unsigned for number of params since can't be negative.
I don't think that it breaks anything currently i.e in worst case scenario
chip won't be found in sysfs but from correctness pov you are right. Will
change that in v2.
>You could also use a flex array to avoid any buf size issues.
Okay, will address that in v2.
