On 9/25/2023 7:06 AM, Chaoyong He wrote: > From: Shihong Wang <shihong.w...@corigine.com> > > Add TLV capabilities to the BAR, TLVs is fit for expressing > capabilities of applications running on programmable hardware. >
Here application referred is bitstream or FW, right? And PCIe BAR is used to exchange the capability information. Not for this patch, but I wonder is there a value to add this kind of parsing to the PCI code, if it is a generic usage, Chaoyong what do you think? > Declares a TLV capability start at offset 0x58, up to 0x0d90. > The used space can be wrapped with RESERVED. > > Signed-off-by: Shihong Wang <shihong.w...@corigine.com> > Signed-off-by: Chang Miao <chang.m...@corigine.com> > Reviewed-by: Chaoyong He <chaoyong...@corigine.com> > <...>
