Currently available NVIDIA NICs and DPUs do not have a capability to calculate the UDP checksum in the header added using encapsulation flow actions.
This limitation was not documented in mlx5 PMD docs. This patch adds this limitation to the docs and describes application requirements. Signed-off-by: Dariusz Sosnowski <dsosnow...@nvidia.com> Acked-by: Ori Kam <or...@nvidia.com> --- doc/guides/nics/mlx5.rst | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 505873ecfd..43aef669e6 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -480,6 +480,14 @@ Limitations - The input buffer, providing the removal size, is not validated. - The buffer size must match the length of the headers to be removed. +- Outer UDP checksum calculation for encapsulation flow actions: + + - Currently available NVIDIA NICs and DPUs do not have a capability to calculate + the UDP checksum in the header added using encapsulation flow actions. + + Applications are required to use 0 in UDP checksum field in such flow actions. + Resulting packet will have outer UDP checksum equal to 0. + - ICMP(code/type/identifier/sequence number) / ICMP6(code/type/identifier/sequence number) matching, IP-in-IP and MPLS flow matching are all mutually exclusive features which cannot be supported together (see :ref:`mlx5_firmware_config`). -- 2.25.1
