From: Huisong Li <lihuis...@huawei.com>

Driver doesn't initialize RTC time during probe phase, which
lead to an inaccurate time.

Fixes: 38b539d96eb6 ("net/hns3: support IEEE 1588 PTP")
Cc: sta...@dpdk.org

Signed-off-by: Huisong Li <lihuis...@huawei.com>
Signed-off-by: Dongdong Liu <liudongdo...@huawei.com>
---
 drivers/net/hns3/hns3_ptp.c | 26 +++++++++++++++++++-------
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/drivers/net/hns3/hns3_ptp.c b/drivers/net/hns3/hns3_ptp.c
index db3c007b12..1e27e4aeca 100644
--- a/drivers/net/hns3/hns3_ptp.c
+++ b/drivers/net/hns3/hns3_ptp.c
@@ -56,9 +56,23 @@ hns3_ptp_int_en(struct hns3_hw *hw, bool en)
        return ret;
 }
 
+static void
+hns3_ptp_timesync_write_time(struct hns3_hw *hw, const struct timespec *ts)
+{
+       uint64_t sec = ts->tv_sec;
+       uint64_t ns = ts->tv_nsec;
+
+       /* Set the timecounters to a new value. */
+       hns3_write_dev(hw, HNS3_CFG_TIME_SYNC_H, upper_32_bits(sec));
+       hns3_write_dev(hw, HNS3_CFG_TIME_SYNC_M, lower_32_bits(sec));
+       hns3_write_dev(hw, HNS3_CFG_TIME_SYNC_L, lower_32_bits(ns));
+       hns3_write_dev(hw, HNS3_CFG_TIME_SYNC_RDY, 1);
+}
+
 int
 hns3_ptp_init(struct hns3_hw *hw)
 {
+       struct timespec sys_time;
        int ret;
 
        if (!hns3_dev_get_support(hw, PTP))
@@ -71,6 +85,10 @@ hns3_ptp_init(struct hns3_hw *hw)
        /* Start PTP timer */
        hns3_write_dev(hw, HNS3_CFG_TIME_CYC_EN, 1);
 
+       /* Initializing the RTC. */
+       clock_gettime(CLOCK_REALTIME, &sys_time);
+       hns3_ptp_timesync_write_time(hw, &sys_time);
+
        return 0;
 }
 
@@ -241,17 +259,11 @@ int
 hns3_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts)
 {
        struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-       uint64_t sec = ts->tv_sec;
-       uint64_t ns = ts->tv_nsec;
 
        if (!hns3_dev_get_support(hw, PTP))
                return -ENOTSUP;
 
-       /* Set the timecounters to a new value. */
-       hns3_write_dev(hw, HNS3_CFG_TIME_SYNC_H, upper_32_bits(sec));
-       hns3_write_dev(hw, HNS3_CFG_TIME_SYNC_M, lower_32_bits(sec));
-       hns3_write_dev(hw, HNS3_CFG_TIME_SYNC_L, lower_32_bits(ns));
-       hns3_write_dev(hw, HNS3_CFG_TIME_SYNC_RDY, 1);
+       hns3_ptp_timesync_write_time(hw, ts);
 
        return 0;
 }
-- 
2.22.0

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