From: Beilei Xing <beilei.x...@intel.com> Update cpfl.rst to clarify hairpin support.
Signed-off-by: Beilei Xing <beilei.x...@intel.com> --- doc/guides/nics/cpfl.rst | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/doc/guides/nics/cpfl.rst b/doc/guides/nics/cpfl.rst index d25db088eb..8d5c3082e4 100644 --- a/doc/guides/nics/cpfl.rst +++ b/doc/guides/nics/cpfl.rst @@ -106,3 +106,10 @@ The paths are chosen based on 2 conditions: A value "P" means the offload feature is not supported by vector path. If any not supported features are used, cpfl vector PMD is disabled and the scalar paths are chosen. + +Hairpin queue +~~~~~~~~~~~~~ + + E2100 Series can loopback packets from RX port to TX port, this feature is + called port-to-port or hairpin. + Currently, the PMD only supports single port hairpin. -- 2.26.2
