This patch adds function to query hca capability via Devx for
lag_rx_port_affinity.
Signed-off-by: Jiawei Wang <jiaw...@nvidia.com>
---
drivers/common/mlx5/mlx5_devx_cmds.c | 3 +++
drivers/common/mlx5/mlx5_devx_cmds.h | 1 +
drivers/common/mlx5/mlx5_prm.h | 7 +++++--
drivers/net/mlx5/linux/mlx5_os.c | 4 ++++
drivers/net/mlx5/mlx5.h | 2 ++
5 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c
b/drivers/common/mlx5/mlx5_devx_cmds.c
index 9e0b26fa11..16e9e38b0b 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1244,6 +1244,9 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
attr->outer_ipv4_ihl = MLX5_GET
(flow_table_nic_cap, hcattr,
ft_field_support_2_nic_receive.outer_ipv4_ihl);
+ attr->lag_rx_port_affinity = MLX5_GET
+ (flow_table_nic_cap, hcattr,
+ ft_field_support_2_nic_receive.lag_rx_port_affinity);
/* Query HCA offloads for Ethernet protocol. */
hcattr = mlx5_devx_get_hca_cap(ctx, in, out, &rc,
MLX5_GET_HCA_CAP_OP_MOD_ETHERNET_OFFLOAD_CAPS |
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h
b/drivers/common/mlx5/mlx5_devx_cmds.h
index 1c86426e71..4fe0915a65 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -318,6 +318,7 @@ struct mlx5_hca_attr {
uint32_t flow_counter_access_aso:1;
uint32_t flow_access_aso_opc_mod:8;
uint32_t cross_vhca:1;
+ uint32_t lag_rx_port_affinity:1;
};
/* LAG Context. */
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 5b84657e08..9098b0fe0b 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -905,7 +905,8 @@ struct mlx5_ifc_fte_match_set_misc_bits {
u8 vxlan_vni[0x18];
u8 reserved_at_b8[0x8];
u8 geneve_vni[0x18];
- u8 reserved_at_e4[0x6];
+ u8 lag_rx_port_affinity[0x4];
+ u8 reserved_at_e8[0x2];
u8 geneve_tlv_option_0_exist[0x1];
u8 geneve_oam[0x1];
u8 reserved_at_e0[0xc];
@@ -2055,7 +2056,9 @@ struct mlx5_ifc_ft_fields_support_bits {
* Table 1872 - Flow Table Fields Supported 2 Format
*/
struct mlx5_ifc_ft_fields_support_2_bits {
- u8 reserved_at_0[0xd];
+ u8 reserved_at_0[0xa];
+ u8 lag_rx_port_affinity[0x1];
+ u8 reserved_at_c[0x2];
u8 hash_result[0x1];
u8 reserved_at_e[0x1];
u8 tunnel_header_2_3[0x1];
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index d48b9b68ac..3fea72013f 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1402,6 +1402,10 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
DRV_LOG(DEBUG, "DV flow is not supported!");
}
#endif
+ if (hca_attr->lag_rx_port_affinity) {
+ sh->lag_rx_port_affinity_en = 1;
+ DRV_LOG(DEBUG, "LAG Rx Port Affinity enabled");
+ }
}
/* Process parameters and store port configuration on priv structure. */
err = mlx5_port_args_config(priv, mkvlist, &priv->config);
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 761b5ac572..dc4d1a8686 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1399,6 +1399,8 @@ struct mlx5_dev_ctx_shared {
uint32_t hws_tags:1; /* Check if tags info for HWS initialized. */
uint32_t shared_mark_enabled:1;
/* If mark action is enabled on Rxqs (shared E-Switch domain). */
+ uint32_t lag_rx_port_affinity_en:1;
+ /* lag_rx_port_affinity is supported. */
uint32_t hws_max_log_bulk_sz:5;
/* Log of minimal HWS counters created hard coded. */
uint32_t hws_max_nb_counters; /* Maximal number for HWS counters. */
--
2.18.1
