Add support for switching from ethernet (eCPRI) to CPRI mode.
Signed-off-by: Tomasz Duszynski <tduszyn...@marvell.com>
Reviewed-by: Jakub Palider <jpali...@marvell.com>
Reviewed-by: Jerin Jacob Kollanukkaran <jer...@marvell.com>
---
doc/guides/rawdevs/cnxk_bphy.rst | 11 +++++++
drivers/common/cnxk/roc_bphy_cgx.c | 33 ++++++++++++++++++++
drivers/common/cnxk/roc_bphy_cgx.h | 14 +++++++--
drivers/common/cnxk/roc_bphy_cgx_priv.h | 8 +++++
drivers/common/cnxk/roc_model.h | 24 +++++++++++++++
drivers/common/cnxk/version.map | 1 +
drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c | 13 ++++++++
drivers/raw/cnxk_bphy/rte_pmd_bphy.h | 40 +++++++++++++++++++++++++
8 files changed, 141 insertions(+), 3 deletions(-)
diff --git a/doc/guides/rawdevs/cnxk_bphy.rst b/doc/guides/rawdevs/cnxk_bphy.rst
index 522390bf1b..7f55e9eac6 100644
--- a/doc/guides/rawdevs/cnxk_bphy.rst
+++ b/doc/guides/rawdevs/cnxk_bphy.rst
@@ -100,6 +100,17 @@ Message must have type set to
``CNXK_BPHY_CGX_MSG_TYPE_START_RXTX`` or
``CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX``. Former will enable traffic while the
latter will
do the opposite.
+Change mode from eCPRI to CPRI
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Message is used to change operating mode from eCPRI to CPRI along with other
+settings.
+
+Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_CPRI_MODE_CHANGE``.
+Prior to sending actual message payload i.e
+``struct cnxk_bphy_cgx_msg_cpri_mode_change`` needs to be filled with relevant
+information.
+
BPHY PMD
--------
diff --git a/drivers/common/cnxk/roc_bphy_cgx.c
b/drivers/common/cnxk/roc_bphy_cgx.c
index a0a0d22f85..223bd313fa 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.c
+++ b/drivers/common/cnxk/roc_bphy_cgx.c
@@ -455,3 +455,36 @@ roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx
*roc_cgx, unsigned int lmac,
return 0;
}
+
+int
+roc_bphy_cgx_cpri_mode_change(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+ struct roc_bphy_cgx_cpri_mode_change *mode)
+{
+ uint64_t scr1, scr0;
+
+ if (!(roc_model_is_cnf95xxn_a0() ||
+ roc_model_is_cnf95xxn_a1() ||
+ roc_model_is_cnf95xxn_b0()))
+ return -ENOTSUP;
+
+ if (!roc_cgx)
+ return -EINVAL;
+
+ if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+ return -ENODEV;
+
+ if (!mode)
+ return -EINVAL;
+
+ scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_CPRI_MODE_CHANGE) |
+ FIELD_PREP(SCR1_CPRI_MODE_CHANGE_ARGS_GSERC_IDX,
+ mode->gserc_idx) |
+ FIELD_PREP(SCR1_CPRI_MODE_CHANGE_ARGS_LANE_IDX, mode->lane_idx) |
+ FIELD_PREP(SCR1_CPRI_MODE_CHANGE_ARGS_RATE, mode->rate) |
+ FIELD_PREP(SCR1_CPRI_MODE_CHANGE_ARGS_DISABLE_LEQ,
+ mode->disable_leq) |
+ FIELD_PREP(SCR1_CPRI_MODE_CHANGE_ARGS_DISABLE_DFE,
+ mode->disable_dfe);
+
+ return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
+}
diff --git a/drivers/common/cnxk/roc_bphy_cgx.h
b/drivers/common/cnxk/roc_bphy_cgx.h
index d522d4e202..59adddd420 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.h
+++ b/drivers/common/cnxk/roc_bphy_cgx.h
@@ -92,6 +92,14 @@ struct roc_bphy_cgx_link_info {
enum roc_bphy_cgx_eth_link_mode mode;
};
+struct roc_bphy_cgx_cpri_mode_change {
+ int gserc_idx;
+ int lane_idx;
+ int rate;
+ bool disable_leq;
+ bool disable_dfe;
+};
+
__roc_api int roc_bphy_cgx_dev_init(struct roc_bphy_cgx *roc_cgx);
__roc_api int roc_bphy_cgx_dev_fini(struct roc_bphy_cgx *roc_cgx);
@@ -118,9 +126,9 @@ __roc_api int roc_bphy_cgx_ptp_rx_disable(struct
roc_bphy_cgx *roc_cgx,
__roc_api int roc_bphy_cgx_fec_set(struct roc_bphy_cgx *roc_cgx,
unsigned int lmac,
enum roc_bphy_cgx_eth_link_fec fec);
-__roc_api int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx,
- unsigned int lmac,
+__roc_api int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx,
unsigned int lmac,
enum roc_bphy_cgx_eth_link_fec
*fec);
-
+__roc_api int roc_bphy_cgx_cpri_mode_change(struct roc_bphy_cgx *roc_cgx,
unsigned int lmac,
+ struct
roc_bphy_cgx_cpri_mode_change *mode);
#endif /* _ROC_BPHY_CGX_H_ */
diff --git a/drivers/common/cnxk/roc_bphy_cgx_priv.h
b/drivers/common/cnxk/roc_bphy_cgx_priv.h
index 6a6b5a7b08..cdd94989c8 100644
--- a/drivers/common/cnxk/roc_bphy_cgx_priv.h
+++ b/drivers/common/cnxk/roc_bphy_cgx_priv.h
@@ -69,6 +69,7 @@ enum eth_cmd_id {
ETH_CMD_GET_SUPPORTED_FEC = 18,
ETH_CMD_SET_FEC = 19,
ETH_CMD_SET_PTP_MODE = 34,
+ ETH_CMD_CPRI_MODE_CHANGE = 35,
};
/* event types - cause of interrupt */
@@ -133,6 +134,13 @@ enum eth_cmd_own {
/* struct eth_set_fec_args */
#define SCR1_ETH_SET_FEC_ARGS GENMASK_ULL(9, 8)
+/* struct eth_cpri_mode_change_args */
+#define SCR1_CPRI_MODE_CHANGE_ARGS_GSERC_IDX GENMASK_ULL(11, 8)
+#define SCR1_CPRI_MODE_CHANGE_ARGS_LANE_IDX GENMASK_ULL(15, 12)
+#define SCR1_CPRI_MODE_CHANGE_ARGS_RATE GENMASK_ULL(31, 16)
+#define SCR1_CPRI_MODE_CHANGE_ARGS_DISABLE_LEQ BIT_ULL(32)
+#define SCR1_CPRI_MODE_CHANGE_ARGS_DISABLE_DFE BIT_ULL(33)
+
#define SCR1_OWN_STATUS GENMASK_ULL(1, 0)
#endif /* _ROC_BPHY_CGX_PRIV_H_ */
diff --git a/drivers/common/cnxk/roc_model.h b/drivers/common/cnxk/roc_model.h
index 4567566169..e28965d896 100644
--- a/drivers/common/cnxk/roc_model.h
+++ b/drivers/common/cnxk/roc_model.h
@@ -134,6 +134,30 @@ roc_model_is_cn95_a0(void)
return roc_model->flag & ROC_MODEL_CNF95xx_A0;
}
+static inline uint64_t
+roc_model_is_cnf95xxn_a0(void)
+{
+ return roc_model->flag & ROC_MODEL_CNF95xxN_A0;
+}
+
+static inline uint64_t
+roc_model_is_cnf95xxn_a1(void)
+{
+ return roc_model->flag & ROC_MODEL_CNF95xxN_A1;
+}
+
+static inline uint64_t
+roc_model_is_cnf95xxn_b0(void)
+{
+ return roc_model->flag & ROC_MODEL_CNF95xxN_B0;
+}
+
+static inline uint16_t
+roc_model_is_cn95xxn_a0(void)
+{
+ return roc_model->flag & ROC_MODEL_CNF95xxN_A0;
+}
+
static inline uint64_t
roc_model_is_cn10ka(void)
{
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index a77f3f6e3c..720cad61ea 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -28,6 +28,7 @@ INTERNAL {
roc_ae_fpm_get;
roc_ae_fpm_put;
roc_aes_xcbc_key_derive;
+ roc_bphy_cgx_cpri_mode_change;
roc_bphy_cgx_dev_fini;
roc_bphy_cgx_dev_init;
roc_bphy_cgx_fec_set;
diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c
b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c
index 169cbc7855..803b245c78 100644
--- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c
+++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c
@@ -56,10 +56,12 @@ cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx,
unsigned int queue,
struct rte_rawdev_buf *buf)
{
struct cnxk_bphy_cgx_queue *qp = &cgx->queues[queue];
+ struct cnxk_bphy_cgx_msg_cpri_mode_change *cpri_mode;
struct cnxk_bphy_cgx_msg_set_link_state *link_state;
struct cnxk_bphy_cgx_msg *msg = buf->buf_addr;
struct cnxk_bphy_cgx_msg_link_mode *link_mode;
struct cnxk_bphy_cgx_msg_link_info *link_info;
+ struct roc_bphy_cgx_cpri_mode_change rcpri_mode;
struct roc_bphy_cgx_link_info rlink_info;
struct roc_bphy_cgx_link_mode rlink_mode;
enum roc_bphy_cgx_eth_link_fec *fec;
@@ -135,6 +137,17 @@ cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx,
unsigned int queue,
fec = msg->data;
ret = roc_bphy_cgx_fec_set(cgx->rcgx, lmac, *fec);
break;
+ case CNXK_BPHY_CGX_MSG_TYPE_CPRI_MODE_CHANGE:
+ cpri_mode = msg->data;
+ memset(&rcpri_mode, 0, sizeof(rcpri_mode));
+ rcpri_mode.gserc_idx = cpri_mode->gserc_idx;
+ rcpri_mode.lane_idx = cpri_mode->lane_idx;
+ rcpri_mode.rate = cpri_mode->rate;
+ rcpri_mode.disable_leq = cpri_mode->disable_leq;
+ rcpri_mode.disable_dfe = cpri_mode->disable_dfe;
+ ret = roc_bphy_cgx_cpri_mode_change(cgx->rcgx, lmac,
+ &rcpri_mode);
+ break;
default:
return -EINVAL;
}
diff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
index db8a13a4f8..36b75aa385 100644
--- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
+++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
@@ -50,6 +50,8 @@ enum cnxk_bphy_cgx_msg_type {
CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,
/** Type used to set FEC */
CNXK_BPHY_CGX_MSG_TYPE_SET_FEC,
+ /** Type used to switch from eCPRI to CPRI */
+ CNXK_BPHY_CGX_MSG_TYPE_CPRI_MODE_CHANGE,
};
/** Available link speeds */
@@ -171,6 +173,19 @@ struct cnxk_bphy_cgx_msg_set_link_state {
bool state; /* up or down */
};
+struct cnxk_bphy_cgx_msg_cpri_mode_change {
+ /** SERDES index (0 - 4) */
+ int gserc_idx;
+ /** Lane index (0 - 1) */
+ int lane_idx;
+ /** Baud rate (9830/4915/2458/6144/3072) */
+ int rate;
+ /** Disable LEQ */
+ bool disable_leq;
+ /** Disable DFE */
+ bool disable_dfe;
+};
+
struct cnxk_bphy_cgx_msg {
/** Message type */
enum cnxk_bphy_cgx_msg_type type;
@@ -694,6 +709,31 @@ rte_pmd_bphy_cgx_set_fec(uint16_t dev_id, uint16_t lmac,
return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
}
+/**
+ * Switch from eCPRI to CPRI and change
+ *
+ * @param dev_id
+ * The identifier of the device
+ * @param lmac
+ * LMAC number for operation
+ * @param mode
+ * CPRI structure which holds configuration data
+ *
+ * @return
+ * Returns 0 on success, negative error code otherwise
+ */
+static __rte_always_inline int
+rte_pmd_bphy_cgx_cpri_mode_change(uint16_t dev_id, uint16_t lmac,
+ struct cnxk_bphy_cgx_msg_cpri_mode_change
*mode)
+{
+ struct cnxk_bphy_cgx_msg msg = {
+ .type = CNXK_BPHY_CGX_MSG_TYPE_CPRI_MODE_CHANGE,
+ .data = mode,
+ };
+
+ return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
+}
+
#ifdef __cplusplus
}
#endif
--
2.25.1
