29/03/2022 17:13, Chautru, Nicolas: > Hi Thomas, > > The ACC101 PMD is to support a new silicon being PRQ this year by Intel. Note > this is not a FPGA but an actual ASIC. > There is some similarity with ACC100 but still a brand new silicon, new > features, number of silicon bug fixes, different number of engines, different > performance and hence a separate PMD. > Let me know I unclear
Are you sure you tried hard to manage them with a common code? Last time we asked such question, it was for DLB, and it became clear later that it should be the same code, otherwise you fix bugs two times, etc. I understand it is a new silicon, but do you know the net driver mlx5 is the same for various hardware of the last 10 years? > From: Thomas Monjalon <tho...@monjalon.net> > > 24/03/2022 09:32, Mcnamara, John: > > > * DLB allow assignment of SW/HW credit quanta assignment on port usage > > > hint > > > * DLB allow dlb2 eventdev apps to use specific COS on per port basis > > > * DLB add support for DLB 2.5 QE weight hardware feature > > > > DLB and DLB2 were introduced as different but very similar drivers, and they > > got eventually merged. > > > > > * bbdev new PMD for Intel ACC101 device > > > > Is it really going to be a separate driver of ACC100?
