Hi Thomas, The ACC101 PMD is to support a new silicon being PRQ this year by Intel. Note this is not a FPGA but an actual ASIC. There is some similarity with ACC100 but still a brand new silicon, new features, number of silicon bug fixes, different number of engines, different performance and hence a separate PMD. Let me know I unclear Nic
> -----Original Message----- > From: Thomas Monjalon <tho...@monjalon.net> > Sent: Tuesday, March 29, 2022 5:15 AM > To: Mcnamara, John <john.mcnam...@intel.com> > Cc: dev@dpdk.org; Devlin, Michelle <michelle.dev...@intel.com> > Subject: Re: Intel roadmap for 22.07 > > 24/03/2022 09:32, Mcnamara, John: > > * DLB allow assignment of SW/HW credit quanta assignment on port usage > > hint > > * DLB allow dlb2 eventdev apps to use specific COS on per port basis > > * DLB add support for DLB 2.5 QE weight hardware feature > > DLB and DLB2 were introduced as different but very similar drivers, and they > got eventually merged. > > > * bbdev new PMD for Intel ACC101 device > > Is it really going to be a separate driver of ACC100? >
