Hi,
> -----Original Message-----
> From: Dariusz Sosnowski <dsosnow...@nvidia.com>
> Sent: Monday, February 7, 2022 5:49 PM
> To: Matan Azrad <ma...@nvidia.com>; Slava Ovsiienko
> <viachesl...@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasl...@nvidia.com>;
> sta...@dpdk.org
> Subject: [PATCH] net/mlx5: fix inline length for multi-segment TSO
>
> This patch removes a redundant assert in mlx5_tx_packet_multi_tso().
> That assert assured that the amount of bytes requested to be inlined
> is greater than or equal to the minimum amount of bytes required
> to be inlined. This requirement is either derived from the NIC
> inlining mode or configured through devargs. When using TSO this
> requirement can be disregarded, because on all NICs it is satisfied by TSO
> inlining requirements, since TSO requires L2, L3, and L4 headers to be
> inlined.
>
> Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
> Cc: viachesl...@nvidia.com
> Cc: sta...@dpdk.org
>
> Signed-off-by: Dariusz Sosnowski <dsosnow...@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
