> -----Original Message----- > From: Ferruh Yigit <ferruh.yi...@intel.com> > Sent: Thursday, February 3, 2022 9:36 PM > To: Jerin Jacob Kollanukkaran <jer...@marvell.com>; dev@dpdk.org; Xiaoyun > Li <xiaoyun...@intel.com>; Aman Singh <aman.deep.si...@intel.com>; > Yuying Zhang <yuying.zh...@intel.com> > Cc: tho...@monjalon.net; ajit.khapa...@broadcom.com; > abo...@pensando.io; andrew.rybche...@oktetlabs.ru; > beilei.x...@intel.com; bruce.richard...@intel.com; ch...@att.com; > chenbo....@intel.com; ciara.lof...@intel.com; Devendra Singh Rawat > <dsinghra...@marvell.com>; ed.cz...@atomicrules.com; > evge...@amazon.com; gr...@u256.net; g.si...@nxp.com; > zhouguoy...@huawei.com; haiyue.w...@intel.com; Harman Kalra > <hka...@marvell.com>; heinrich.k...@corigine.com; > hemant.agra...@nxp.com; hyon...@cisco.com; igo...@amazon.com; Igor > Russkikh <irussk...@marvell.com>; jgraj...@cisco.com; > jasvinder.si...@intel.com; jianw...@trustnetic.com; > jiawe...@trustnetic.com; jingjing...@intel.com; johnd...@cisco.com; > john.mil...@atomicrules.com; linvi...@tuxdriver.com; > keith.wi...@intel.com; Kiran Kumar Kokkilagadda > <kirankum...@marvell.com>; ouli...@huawei.com; Liron Himi > <lir...@marvell.com>; lon...@microsoft.com; m...@semihalf.com; > spin...@cesnet.cz; ma...@nvidia.com; matt.pet...@windriver.com; > maxime.coque...@redhat.com; m...@semihalf.com; humi...@huawei.com; > Pradeep Kumar Nalla <pna...@marvell.com>; Nithin Kumar Dabilpuram > <ndabilpu...@marvell.com>; qiming.y...@intel.com; > qi.z.zh...@intel.com; Radha Chintakuntla <rad...@marvell.com>; > rahul.lakkire...@chelsio.com; Rasesh Mody <rm...@marvell.com>; > rosen...@intel.com; sachin.sax...@oss.nxp.com; Satha Koteswara Rao > Kottidi <skotesh...@marvell.com>; Shahed Shaikh > <shsha...@marvell.com>; shaib...@amazon.com; > shepard.sie...@atomicrules.com; asoma...@amd.com; > somnath.ko...@broadcom.com; sthem...@microsoft.com; > steven.webs...@windriver.com; Sunil Kumar Kori <sk...@marvell.com>; > mtetsu...@gmail.com; Veerasenareddy Burru <vbu...@marvell.com>; > viachesl...@nvidia.com; xiao.w.w...@intel.com; > cloud.wangxiao...@huawei.com; yisen.zhu...@huawei.com; > yongw...@vmware.com; xuanziya...@huawei.com > Subject: [EXT] Re: [dpdk-dev] [PATCH v3 2/2] app/testpmd: add queue based > pfc CLI options > > External Email > > ---------------------------------------------------------------------- > On 1/31/2022 6:08 PM, jer...@marvell.com wrote: > > From: Sunil Kumar Kori <sk...@marvell.com> > > > > Patch adds command line options to configure queue based priority flow > > control. > > > > - Syntax command is given as below: > > > > set pfc_queue_ctrl <port_id> rx <on|off> <tx_qid> <tx_tc> \ > > tx <on|off> <rx_qid> <rx_tc> <pause_time> > > > > Ahh I see the order is related to the configure struct, where tx_qid is part > of > rx_pause struct. > Can you please explaing this items selection in the struct? > Most probaly it will clarify the above usage. > Ack.
> > - Example command to configure queue based priority flow control > > on rx and tx side for port 0, Rx queue 0, Tx queue 0 with pause > > time 2047 > > > > testpmd> set pfc_queue_ctrl 0 rx on 0 0 tx on 0 0 2047 > > > > Signed-off-by: Sunil Kumar Kori <sk...@marvell.com> > > <...> > > > > > +set pfc_queue_ctrl > > +~~~~~~~~~~~~~~~~~~ > > + > > +Set the priority flow control parameter on a given Rx and Tx queue of a > port:: > > + > > + testpmd> set pfc_queue_ctrl <port_id> rx (on|off) <tx_qid> <tx_tc> \ > > + tx (on|off) <rx_qid> <rx_tc> <pause_time> > > + > > +Where: > > + > > +* ``tx_qid`` (integer): Tx qid for which ``tx_tc`` will be applied > > +and traffic > > + will be paused when PFC frame is received with ``tx_tc`` enabled. > > + > > +* ``tx_tc`` (0-15): TC for which traffic is to be paused for xmit. > > + > > +* ``rx_qid`` (integer): Rx qid for which threshold will be applied > > +and PFC > > + frame will be generated with ``tx_tc`` when exceeds the threshold. > > + > > +* ``rx_tc`` (0-15): TC filled in PFC frame for which remote Tx is to be > paused. > > + > > +* ``pause_time`` (integer): Pause quota filled in the PFC frame. > > + > > 'pause_time' is related to the TX pause configuration, right? At least in the > config struct it only exists for Tx. If so can you please document this? > Ack.
