>-----Original Message----- >From: Ferruh Yigit <ferruh.yi...@intel.com> >Sent: Tuesday, January 25, 2022 11:07 PM >To: Jerin Jacob Kollanukkaran <jer...@marvell.com>; dev@dpdk.org; Xiaoyun >Li <xiaoyun...@intel.com>; Aman Singh <aman.deep.si...@intel.com>; Yuying >Zhang <yuying.zh...@intel.com> >Cc: tho...@monjalon.net; ajit.khapa...@broadcom.com; >abo...@pensando.io; andrew.rybche...@oktetlabs.ru; >beilei.x...@intel.com; bruce.richard...@intel.com; ch...@att.com; >chenbo....@intel.com; ciara.lof...@intel.com; Devendra Singh Rawat ><dsinghra...@marvell.com>; ed.cz...@atomicrules.com; >evge...@amazon.com; gr...@u256.net; g.si...@nxp.com; >zhouguoy...@huawei.com; haiyue.w...@intel.com; Harman Kalra ><hka...@marvell.com>; heinrich.k...@corigine.com; >hemant.agra...@nxp.com; hyon...@cisco.com; igo...@amazon.com; Igor >Russkikh <irussk...@marvell.com>; jgraj...@cisco.com; >jasvinder.si...@intel.com; jianw...@trustnetic.com; >jiawe...@trustnetic.com; jingjing...@intel.com; johnd...@cisco.com; >john.mil...@atomicrules.com; linvi...@tuxdriver.com; keith.wi...@intel.com; >Kiran Kumar Kokkilagadda <kirankum...@marvell.com>; >ouli...@huawei.com; Liron Himi <lir...@marvell.com>; >lon...@microsoft.com; m...@semihalf.com; spin...@cesnet.cz; >ma...@nvidia.com; matt.pet...@windriver.com; >maxime.coque...@redhat.com; m...@semihalf.com; humi...@huawei.com; >Pradeep Kumar Nalla <pna...@marvell.com>; Nithin Kumar Dabilpuram ><ndabilpu...@marvell.com>; qiming.y...@intel.com; qi.z.zh...@intel.com; >Radha Chintakuntla <rad...@marvell.com>; rahul.lakkire...@chelsio.com; >Rasesh Mody <rm...@marvell.com>; rosen...@intel.com; >sachin.sax...@oss.nxp.com; Satha Koteswara Rao Kottidi ><skotesh...@marvell.com>; Shahed Shaikh <shsha...@marvell.com>; >shaib...@amazon.com; shepard.sie...@atomicrules.com; >asoma...@amd.com; somnath.ko...@broadcom.com; >sthem...@microsoft.com; steven.webs...@windriver.com; Sunil Kumar Kori ><sk...@marvell.com>; mtetsu...@gmail.com; Veerasenareddy Burru ><vbu...@marvell.com>; viachesl...@nvidia.com; xiao.w.w...@intel.com; >cloud.wangxiao...@huawei.com; yisen.zhu...@huawei.com; >yongw...@vmware.com; xuanziya...@huawei.com >Subject: [EXT] Re: [dpdk-dev] [PATCH v2 2/2] app/testpmd: add queue based >pfc CLI options > >External Email > >---------------------------------------------------------------------- >On 1/13/2022 10:27 AM, jer...@marvell.com wrote: >> From: Sunil Kumar Kori <sk...@marvell.com> >> >> Patch adds command line options to configure queue based priority flow >> control. >> >> - Syntax command is given as below: >> >> set pfc_queue_ctrl <port_id> rx <on|off> <tx_qid> <tx_tc> \ >> tx <on|off> <rx_qid> <rx_tc> <pause_time> >> > >Isn't the order of the paramters odd, it is mixing Rx/Tx config, what about >ordering Rx and Tx paramters? > It's been kept like this to portray config for rx_pause and tx_pause separately i.e. mode and corresponding config.
>> - Example command to configure queue based priority flow control >> on rx and tx side for port 0, Rx queue 0, Tx queue 0 with pause >> time 2047 >> >> testpmd> set pfc_queue_ctrl 0 rx on 0 0 tx on 0 0 2047 >> >> Signed-off-by: Sunil Kumar Kori <sk...@marvell.com> > ><...>
