> From: Nipun Gupta <nipun.gu...@nxp.com>
>
> This patch supports ordered queue for DPAA2 platform.
>
> Signed-off-by: Nipun Gupta <nipun.gu...@nxp.com>
> ---
> drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 255 +++++++++++++++++++-
> drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 8 +-
> drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h | 14 +-
> 3 files changed, 263 insertions(+), 14 deletions(-)
>
> +static uint16_t
> +dpaa2_sec_enqueue_burst_ordered(void *qp, struct rte_crypto_op **ops,
> + uint16_t nb_ops)
> +{
> + /* Function to transmit the frames to given device and VQ*/
> + uint32_t loop;
> + int32_t ret;
> + struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
> + uint32_t frames_to_send, num_free_eq_desc, retry_count;
> + struct qbman_eq_desc eqdesc[MAX_TX_RING_SLOTS];
> + struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
> + struct qbman_swp *swp;
> + uint16_t num_tx = 0;
> + /*todo - need to support multiple buffer pools */
Remove/fix TODO
>
> @@ -3780,6 +3983,40 @@ dpaa2_sec_eventq_attach(const struct
> rte_cryptodev *dev,
> cfg.options |= DPSECI_QUEUE_OPT_ORDER_PRESERVATION;
> cfg.order_preservation_en = 1;
> }
> +
> + if (event->sched_type == RTE_SCHED_TYPE_ORDERED) {
> + struct opr_cfg ocfg;
> +
> + /* Restoration window size = 256 frames */
> + ocfg.oprrws = 3;
> + /* Restoration window size = 512 frames for LX2 */
> + if (dpaa2_svr_family == SVR_LX2160A)
> + ocfg.oprrws = 4;
> + /* Auto advance NESN window enabled */
> + ocfg.oa = 1;
> + /* Late arrival window size disabled */
> + ocfg.olws = 0;
> + /* ORL resource exhaustaion advance NESN disabled */
> + ocfg.oeane = 0;
> + /* Loose ordering enabled */
> + ocfg.oloe = 1;
> + priv->en_loose_ordered = 1;
> + /* Strict ordering enabled if explicitly set */
> + if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
> + ocfg.oloe = 0;
> + priv->en_loose_ordered = 0;
> + }
Can we use devarg to enable strict ordering instead of env variable?
Also need to document this.
