From: Gagandeep Singh <g.si...@nxp.com>
LS1012A MAC PCS block has an erratum that is seen with specific
PHY AR803x. The issue is triggered by the (spec-compliant)
operation of the AR803x PHY on the LS1012A-FRWY board.
Due to this, good FCS packet is reported as error packet by MAC,
so for these error packets FCS should be validated and discard
only real error packets in PFE engine Rx packet path. Now onwards
CRC validation will be handled in pfe.ko and DPDK driver can not
use CRC Forwarding option.
Signed-off-by: Gagandeep Singh <g.si...@nxp.com>
---
drivers/net/pfe/pfe_ethdev.c | 7 +++++--
drivers/net/pfe/pfe_hal.c | 4 ++--
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/net/pfe/pfe_ethdev.c b/drivers/net/pfe/pfe_ethdev.c
index 047010e15e..bfcaf51dd9 100644
--- a/drivers/net/pfe/pfe_ethdev.c
+++ b/drivers/net/pfe/pfe_ethdev.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2020 NXP
*/
#include <sys/ioctl.h>
@@ -422,8 +422,11 @@ pfe_eth_close(struct rte_eth_dev *dev)
}
static int
-pfe_eth_configure(struct rte_eth_dev *dev __rte_unused)
+pfe_eth_configure(struct rte_eth_dev *dev)
{
+ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)
+ PFE_PMD_ERR("PMD does not support KEEP_CRC offload");
+
return 0;
}
diff --git a/drivers/net/pfe/pfe_hal.c b/drivers/net/pfe/pfe_hal.c
index 41d783dbff..f49d1728b2 100644
--- a/drivers/net/pfe/pfe_hal.c
+++ b/drivers/net/pfe/pfe_hal.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2020 NXP
*/
#include <arpa/inet.h>
@@ -191,7 +191,7 @@ gemac_set_mode(void *base, __rte_unused int mode)
val &= ~EMAC_RCNTRL_LOOP;
/*Enable flow control and MII mode*/
- val |= (EMAC_RCNTRL_FCE | EMAC_RCNTRL_MII_MODE | EMAC_RCNTRL_CRC_FWD);
+ val |= (EMAC_RCNTRL_FCE | EMAC_RCNTRL_MII_MODE);
writel(val, base + EMAC_RCNTRL_REG);
}
--
2.17.1
