From: Huisong Li <lihuis...@huawei.com> The patch obtains the upper 32 bits of the Rx/Tx queue DMA address in one step instead of two steps.
Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations") Signed-off-by: Huisong Li <lihuis...@huawei.com> --- drivers/net/hns3/hns3_rxtx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index ceb98025f8..00af73c850 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -322,7 +322,7 @@ hns3_init_rx_queue_hw(struct hns3_rx_queue *rxq) hns3_write_dev(rxq, HNS3_RING_RX_BASEADDR_L_REG, (uint32_t)dma_addr); hns3_write_dev(rxq, HNS3_RING_RX_BASEADDR_H_REG, - (uint32_t)((dma_addr >> 31) >> 1)); + (uint32_t)(dma_addr >> 32)); hns3_write_dev(rxq, HNS3_RING_RX_BD_LEN_REG, hns3_buf_size2type(rx_buf_len)); @@ -337,7 +337,7 @@ hns3_init_tx_queue_hw(struct hns3_tx_queue *txq) hns3_write_dev(txq, HNS3_RING_TX_BASEADDR_L_REG, (uint32_t)dma_addr); hns3_write_dev(txq, HNS3_RING_TX_BASEADDR_H_REG, - (uint32_t)((dma_addr >> 31) >> 1)); + (uint32_t)(dma_addr >> 32)); hns3_write_dev(txq, HNS3_RING_TX_BD_NUM_REG, HNS3_CFG_DESC_NUM(txq->nb_tx_desc)); -- 2.33.0