> -----Original Message-----
> From: Maxime Coquelin <maxime.coque...@redhat.com>
> Sent: Wednesday, October 27, 2021 12:29 AM
> To: dev@dpdk.org; Xia, Chenbo <chenbo....@intel.com>; Hu, Jiayu
> <jiayu...@intel.com>; Wang, YuanX <yuanx.w...@intel.com>; Ma, WenwuX
> <wenwux...@intel.com>; Richardson, Bruce <bruce.richard...@intel.com>;
> Mcnamara, John <john.mcnam...@intel.com>
> Cc: Maxime Coquelin <maxime.coque...@redhat.com>
> Subject: [PATCH v2 02/15] vhost: hide inflight async structure
> 
> This patch moves async_inflight_info struct to internal
> header since it should not be part of the API.
> 
> Signed-off-by: Maxime Coquelin <maxime.coque...@redhat.com>
> ---
>  lib/vhost/rte_vhost_async.h | 9 ---------
>  lib/vhost/vhost.h           | 9 +++++++++
>  2 files changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/lib/vhost/rte_vhost_async.h b/lib/vhost/rte_vhost_async.h
> index ad71555a7f..789b80f5a0 100644
> --- a/lib/vhost/rte_vhost_async.h
> +++ b/lib/vhost/rte_vhost_async.h
> @@ -83,15 +83,6 @@ struct rte_vhost_async_channel_ops {
>               uint16_t max_packets);
>  };
> 
> -/**
> - * inflight async packet information
> - */
> -struct async_inflight_info {
> -     struct rte_mbuf *mbuf;
> -     uint16_t descs; /* num of descs inflight */
> -     uint16_t nr_buffers; /* num of buffers inflight for packed ring */
> -};
> -
>  /**
>   *  async channel features
>   */
> diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
> index a556d61063..8c1c33c852 100644
> --- a/lib/vhost/vhost.h
> +++ b/lib/vhost/vhost.h
> @@ -119,6 +119,15 @@ struct vring_used_elem_packed {
>       uint32_t count;
>  };
> 
> +/**
> + * inflight async packet information
> + */
> +struct async_inflight_info {
> +     struct rte_mbuf *mbuf;
> +     uint16_t descs; /* num of descs inflight */
> +     uint16_t nr_buffers; /* num of buffers inflight for packed ring */
> +};
> +
>  struct vhost_async {
>       /* operation callbacks for DMA */
>       struct rte_vhost_async_channel_ops ops;
> --
> 2.31.1

Reviewed-by: Chenbo Xia <chenbo....@intel.com>

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