> -----邮件原件-----
> 发件人: Ananyev, Konstantin <konstantin.anan...@intel.com>
> 发送时间: Tuesday, October 26, 2021 5:59 PM
> 收件人: Feifei Wang <feifei.wa...@arm.com>
> 抄送: dev@dpdk.org; nd <n...@arm.com>; nd <n...@arm.com>
> 主题: RE: [PATCH v5 1/5] eal: add new definitions for wait scheme
>
>
> > > > Introduce macros as generic interface for address monitoring.
> > > > For different size, encapsulate '__LOAD_EXC_16', '__LOAD_EXC_32'
> > > > and '__LOAD_EXC_64' into a new macro '__LOAD_EXC'.
> > > >
> > > > Furthermore, to prevent compilation warning in arm:
> > > > ----------------------------------------------
> > > > 'warning: implicit declaration of function ...'
> > > > ----------------------------------------------
> > > > Delete 'undef' constructions for '__LOAD_EXC_xx', '__SEVL' and
> '__WFE'.
> > > >
> > > > This is because original macros are undefine at the end of the file.
> > > > If new macro 'rte_wait_event' calls them in other files, they will
> > > > be seen as 'not defined'.
> > > >
> > > > Signed-off-by: Feifei Wang <feifei.wa...@arm.com>
> > > > Reviewed-by: Ruifeng Wang <ruifeng.w...@arm.com>
> > > > ---
> > > > lib/eal/arm/include/rte_pause_64.h | 135
> > > > ++++++++++++++++------------ lib/eal/include/generic/rte_pause.h |
> > > > 27 ++++++
> > > > 2 files changed, 105 insertions(+), 57 deletions(-)
> > > >
> > > > diff --git a/lib/eal/arm/include/rte_pause_64.h
> > > > b/lib/eal/arm/include/rte_pause_64.h
> > > > index e87d10b8cc..1fea0dec63 100644
> > > > --- a/lib/eal/arm/include/rte_pause_64.h
> > > > +++ b/lib/eal/arm/include/rte_pause_64.h
> > > > @@ -31,20 +31,12 @@ static inline void rte_pause(void)
> > > > /* Put processor into low power WFE(Wait For Event) state. */
> > > > #define
> > > > __WFE() { asm volatile("wfe" : : : "memory"); }
> > > >
> > > > -static __rte_always_inline void
> > > > -rte_wait_until_equal_16(volatile uint16_t *addr, uint16_t expected,
> > > > - int memorder)
> > > > -{
> > > > - uint16_t value;
> > > > -
> > > > - assert(memorder == __ATOMIC_ACQUIRE || memorder ==
> > > > __ATOMIC_RELAXED);
> > > > -
> > > > - /*
> > > > - * Atomic exclusive load from addr, it returns the 16-bit
> > > > content of
> > > > - * *addr while making it 'monitored',when it is written by
> > > > someone
> > > > - * else, the 'monitored' state is cleared and a event is
> > > > generated
> > > > - * implicitly to exit WFE.
> > > > - */
> > > > +/*
> > > > + * Atomic exclusive load from addr, it returns the 16-bit content
> > > > +of
> > > > + * *addr while making it 'monitored', when it is written by
> > > > +someone
> > > > + * else, the 'monitored' state is cleared and an event is
> > > > +generated
> > > > + * implicitly to exit WFE.
> > > > + */
> > > > #define __LOAD_EXC_16(src, dst, memorder) { \
> > > > if (memorder == __ATOMIC_RELAXED) { \
> > > > asm volatile("ldxrh %w[tmp], [%x[addr]]" \ @@ -58,6
> > > > +50,62
> @@
> > > > rte_wait_until_equal_16(volatile uint16_t *addr, uint16_t expected,
> > > > : "memory"); \
> > > > } }
> > > >
> > > > +/*
> > > > + * Atomic exclusive load from addr, it returns the 32-bit content
> > > > +of
> > > > + * *addr while making it 'monitored', when it is written by
> > > > +someone
> > > > + * else, the 'monitored' state is cleared and an event is
> > > > +generated
> > > > + * implicitly to exit WFE.
> > > > + */
> > > > +#define __LOAD_EXC_32(src, dst, memorder) { \
> > > > + if (memorder == __ATOMIC_RELAXED) { \
> > > > + asm volatile("ldxr %w[tmp], [%x[addr]]" \
> > > > + : [tmp] "=&r" (dst) \
> > > > + : [addr] "r"(src) \
> > > > + : "memory"); \
> > > > + } else { \
> > > > + asm volatile("ldaxr %w[tmp], [%x[addr]]" \
> > > > + : [tmp] "=&r" (dst) \
> > > > + : [addr] "r"(src) \
> > > > + : "memory"); \
> > > > + } }
> > > > +
> > > > +/*
> > > > + * Atomic exclusive load from addr, it returns the 64-bit content
> > > > +of
> > > > + * *addr while making it 'monitored', when it is written by
> > > > +someone
> > > > + * else, the 'monitored' state is cleared and an event is
> > > > +generated
> > > > + * implicitly to exit WFE.
> > > > + */
> > > > +#define __LOAD_EXC_64(src, dst, memorder) { \
> > > > + if (memorder == __ATOMIC_RELAXED) { \
> > > > + asm volatile("ldxr %x[tmp], [%x[addr]]" \
> > > > + : [tmp] "=&r" (dst) \
> > > > + : [addr] "r"(src) \
> > > > + : "memory"); \
> > > > + } else { \
> > > > + asm volatile("ldaxr %x[tmp], [%x[addr]]" \
> > > > + : [tmp] "=&r" (dst) \
> > > > + : [addr] "r"(src) \
> > > > + : "memory"); \
> > > > + } }
> > > > +
> > > > +#define __LOAD_EXC(src, dst, memorder, size) { \
> > > > + assert(size == 16 || size == 32 || size == 64); \
> > > > + if (size == 16) \
> > > > + __LOAD_EXC_16(src, dst, memorder) \
> > > > + else if (size == 32) \
> > > > + __LOAD_EXC_32(src, dst, memorder) \
> > > > + else if (size == 64) \
> > > > + __LOAD_EXC_64(src, dst, memorder) \
> > > > +}
> > > > +
> > > > +static __rte_always_inline void
> > > > +rte_wait_until_equal_16(volatile uint16_t *addr, uint16_t expected,
> > > > + int memorder)
> > > > +{
> > > > + uint16_t value;
> > > > +
> > > > + assert(memorder == __ATOMIC_ACQUIRE || memorder ==
> > > > __ATOMIC_RELAXED);
> > > > +
> > > > __LOAD_EXC_16(addr, value, memorder)
> > > > if (value != expected) {
> > > > __SEVL()
> > > > @@ -66,7 +114,6 @@ rte_wait_until_equal_16(volatile uint16_t
> > > > *addr, uint16_t expected,
> > > > __LOAD_EXC_16(addr, value, memorder)
> > > > } while (value != expected);
> > > > }
> > > > -#undef __LOAD_EXC_16
> > > > }
> > > >
> > > > static __rte_always_inline void
> > > > @@ -77,25 +124,6 @@ rte_wait_until_equal_32(volatile uint32_t
> > > > *addr, uint32_t expected,
> > > >
> > > > assert(memorder == __ATOMIC_ACQUIRE || memorder ==
> > > > __ATOMIC_RELAXED);
> > > >
> > > > - /*
> > > > - * Atomic exclusive load from addr, it returns the 32-bit
> > > > content of
> > > > - * *addr while making it 'monitored',when it is written by
> > > > someone
> > > > - * else, the 'monitored' state is cleared and a event is
> > > > generated
> > > > - * implicitly to exit WFE.
> > > > - */
> > > > -#define __LOAD_EXC_32(src, dst, memorder) { \
> > > > - if (memorder == __ATOMIC_RELAXED) { \
> > > > - asm volatile("ldxr %w[tmp], [%x[addr]]" \
> > > > - : [tmp] "=&r" (dst) \
> > > > - : [addr] "r"(src) \
> > > > - : "memory"); \
> > > > - } else { \
> > > > - asm volatile("ldaxr %w[tmp], [%x[addr]]" \
> > > > - : [tmp] "=&r" (dst) \
> > > > - : [addr] "r"(src) \
> > > > - : "memory"); \
> > > > - } }
> > > > -
> > > > __LOAD_EXC_32(addr, value, memorder)
> > > > if (value != expected) {
> > > > __SEVL()
> > > > @@ -104,7 +132,6 @@ rte_wait_until_equal_32(volatile uint32_t
> > > > *addr, uint32_t expected,
> > > > __LOAD_EXC_32(addr, value, memorder)
> > > > } while (value != expected);
> > > > }
> > > > -#undef __LOAD_EXC_32
> > > > }
> > > >
> > > > static __rte_always_inline void
> > > > @@ -115,25 +142,6 @@ rte_wait_until_equal_64(volatile uint64_t
> > > > *addr, uint64_t expected,
> > > >
> > > > assert(memorder == __ATOMIC_ACQUIRE || memorder ==
> > > > __ATOMIC_RELAXED);
> > > >
> > > > - /*
> > > > - * Atomic exclusive load from addr, it returns the 64-bit
> > > > content of
> > > > - * *addr while making it 'monitored',when it is written by
> > > > someone
> > > > - * else, the 'monitored' state is cleared and a event is
> > > > generated
> > > > - * implicitly to exit WFE.
> > > > - */
> > > > -#define __LOAD_EXC_64(src, dst, memorder) { \
> > > > - if (memorder == __ATOMIC_RELAXED) { \
> > > > - asm volatile("ldxr %x[tmp], [%x[addr]]" \
> > > > - : [tmp] "=&r" (dst) \
> > > > - : [addr] "r"(src) \
> > > > - : "memory"); \
> > > > - } else { \
> > > > - asm volatile("ldaxr %x[tmp], [%x[addr]]" \
> > > > - : [tmp] "=&r" (dst) \
> > > > - : [addr] "r"(src) \
> > > > - : "memory"); \
> > > > - } }
> > > > -
> > > > __LOAD_EXC_64(addr, value, memorder)
> > > > if (value != expected) {
> > > > __SEVL()
> > > > @@ -143,10 +151,23 @@ rte_wait_until_equal_64(volatile uint64_t
> > > > *addr, uint64_t expected,
> > > > } while (value != expected);
> > > > }
> > > > }
> > > > -#undef __LOAD_EXC_64
> > > >
> > > > -#undef __SEVL
> > > > -#undef __WFE
> > > > +#define rte_wait_event(addr, mask, cond, expected, memorder) \
> > > > +do { \
> > > > + RTE_BUILD_BUG_ON(!__builtin_constant_p(memorder)); \
> > > > + RTE_BUILD_BUG_ON(memorder != __ATOMIC_ACQUIRE && \
> > > > + memorder != __ATOMIC_RELAXED); \
> > > > + uint32_t size = sizeof(*(addr)) << 3; \
> > > > + typeof(*(addr)) value = 0; \
> > > > + __LOAD_EXC((addr), value, memorder, size) \
> > > > + if ((value & (mask)) cond expected) { \
> > > > + __SEVL() \
> > > > + do { \
> > > > + __WFE() \
> > > > + __LOAD_EXC((addr), value, memorder, size) \
> > > > + } while ((value & (mask)) cond expected); \
> > >
> > > Hi, Konstantin
> > >
> > > For this patch, I cannot add '()' for expected due to patch style check
> > > will
> report:
> > > --------------------------------------------------------------------
> > > -----------------------------------------------
> > > WARNING:SPACING: space prohibited between function name and open
> parenthesis '('
> > > #203: FILE: lib/eal/arm/include/rte_pause_64.h:163:
> > > + if ((value & (mask)) cond (expected)) { \
> > >
> > > WARNING:SPACING: space prohibited between function name and open
> parenthesis '('
> > > #208: FILE: lib/eal/arm/include/rte_pause_64.h:168:
> > > + } while ((value & (mask)) cond (expected)); \
> > >
> > > WARNING:SPACING: space prohibited between function name and open
> parenthesis '('
> > > #246: FILE: lib/eal/include/generic/rte_pause.h:138:
> > > + while ((__atomic_load_n((addr), (memorder)) & mask) cond
> > > + (expected)) \
> > >
> > > total: 1 errors, 3 warnings, 211 lines checked
> >
> > It is just checkpatch warnings.
> > Personally I's better live with checkpatch complaints then with problematic
> macro.
> >
> > > --------------------------------------------------------------------
> > > -----------------------------------------------
> > > So I just add '()' for 'addr' and 'mask'.
>
> I wonder can we overcome it by:
> typeof(*(addr)) expected_value = (expected); \ ...
> if ((value & (mask)) cond expected_value) \
> ...
> ?
It's a good comments, and I try to do with this and no check log warning
happens.
Thanks.
>
>
