19/10/2021 20:14, jer...@marvell.com: > Definition of Dataplane Workload Accelerator > -------------------------------------------- > Dataplane Workload Accelerator(DWA) typically contains a set of CPUs, > Network controllers and programmable data acceleration engines for > packet processing, cryptography, regex engines, baseband processing, etc. > This allows DWA to offload compute/packet processing/baseband/ > cryptography-related workload from the host CPU to save the cost and power. > Also to enable scaling the workload by adding DWAs to the Host CPU as needed. > > Unlike other devices in DPDK, the DWA device is not fixed-function > due to the fact that it has CPUs and programmable HW accelerators. > This enables DWA personality/workload to be completely programmable. > Typical examples of DWA offloads are Flow/Session management, > Virtual switch, TLS offload, IPsec offload, l3fwd offload, etc.
If I understand well, the idea is to abstract the offload of some stack layers in the hardware. I am not sure we should give an API for such stack layers in DPDK. It looks to be the role of the dataplane application to finely manage how to use the hardware for a specific dataplane. I believe the API for such layer would be either too big, or too limited, or not optimized for specific needs. If we really want to automate or abstract the HW/SW co-design, I think we should better look at compiler work like P4 or PANDA.
