> -----Original Message-----
> From: Zhang, AlvinX <alvinx.zh...@intel.com>
> Sent: Saturday, May 8, 2021 9:21 AM
> To: Zhang, Qi Z <qi.z.zh...@intel.com>; Yigit, Ferruh <ferruh.yi...@intel.com>
> Cc: dev@dpdk.org; Zhang, AlvinX <alvinx.zh...@intel.com>; sta...@dpdk.org
> Subject: [PATCH v2] net/ice: fix txq vector path selection
>
> If Tx vector mode is disabled, the txq vector mode should be disabled too.
If vector mode is not allowed for Tx, no need to perform vector related setup
for Tx queue
>
> This patch adds checking of Tx vector mode before enabling txq vector mode.
The patch deferred vector setup for Tx queue to the place that vector mode is
confirmed to be allowed.
>
> Fixes: 28f9002ab67f ("net/ice: add Tx AVX512 offload path")
> Cc: sta...@dpdk.org
No need to add Cc stable, if you fix on current release.
>
> Signed-off-by: Alvin Zhang <alvinx.zh...@intel.com>
> ---
>
> v2: Update commit log.
> ---
> drivers/net/ice/ice_rxtx.c | 16 +++++++++-------
> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c index
> 92fbbc1..49abcb2 100644
> --- a/drivers/net/ice/ice_rxtx.c
> +++ b/drivers/net/ice/ice_rxtx.c
> @@ -3303,13 +3303,6 @@
> if (tx_check_ret >= 0 &&
> rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
> ad->tx_vec_allowed = true;
> - for (i = 0; i < dev->data->nb_tx_queues; i++) {
> - txq = dev->data->tx_queues[i];
> - if (txq && ice_txq_vec_setup(txq)) {
> - ad->tx_vec_allowed = false;
> - break;
> - }
> - }
>
> if (rte_vect_get_max_simd_bitwidth() >=
> RTE_VECT_SIMD_512
> &&
> rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
> @@ -3329,6 +3322,15 @@
> if (!use_avx512 && tx_check_ret ==
> ICE_VECTOR_OFFLOAD_PATH)
> ad->tx_vec_allowed = false;
>
> + if (ad->tx_vec_allowed) {
> + for (i = 0; i < dev->data->nb_tx_queues; i++) {
> + txq = dev->data->tx_queues[i];
> + if (txq && ice_txq_vec_setup(txq)) {
> + ad->tx_vec_allowed = false;
> + break;
> + }
> + }
> + }
> } else {
> ad->tx_vec_allowed = false;
> }
> --
> 1.8.3.1
