On 4/25/2021 10:26 AM, Alvin Zhang wrote:
> In some cases, it seems that the txq mbuf vector release mode
> is enabled first, and then it is confirmed that the conditions
> for using the vector mode are not met.
>
Hi Alvin,
As far as I understand the impact is failure in the Tx vector patch selection,
can you please update the patch title to reflect it?
Also can you please describe a little more what is "txq mbuf vector release
mode" and what is the root cause for it to be enabled first?
> This patch puts the txq vector mode startup process after the
> condition detection.
What is "txq vector mode startup process"?
>
> Fixes: 28f9002ab67f ("net/ice: add Tx AVX512 offload path")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Alvin Zhang <alvinx.zh...@intel.com>
> ---
> drivers/net/ice/ice_rxtx.c | 16 +++++++++-------
> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
> index 92fbbc1..49abcb2 100644
> --- a/drivers/net/ice/ice_rxtx.c
> +++ b/drivers/net/ice/ice_rxtx.c
> @@ -3303,13 +3303,6 @@
> if (tx_check_ret >= 0 &&
> rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
> ad->tx_vec_allowed = true;
> - for (i = 0; i < dev->data->nb_tx_queues; i++) {
> - txq = dev->data->tx_queues[i];
> - if (txq && ice_txq_vec_setup(txq)) {
> - ad->tx_vec_allowed = false;
> - break;
> - }
> - }
>
> if (rte_vect_get_max_simd_bitwidth() >=
> RTE_VECT_SIMD_512 &&
> rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
> @@ -3329,6 +3322,15 @@
> if (!use_avx512 && tx_check_ret ==
> ICE_VECTOR_OFFLOAD_PATH)
> ad->tx_vec_allowed = false;
>
> + if (ad->tx_vec_allowed) {
> + for (i = 0; i < dev->data->nb_tx_queues; i++) {
> + txq = dev->data->tx_queues[i];
> + if (txq && ice_txq_vec_setup(txq)) {
> + ad->tx_vec_allowed = false;
> + break;
> + }
> + }
> + }
> } else {
> ad->tx_vec_allowed = false;
> }
>
