On 4/26/2021 6:29 AM, Wenzhuo Lu wrote:
> AVX2 and SSE don't have the offload path.
> Not necessary doing any check. Or the scalar path
> will be chosen.
Hi Wenzhuo,
The fix by not changing Rx implementation, but making sure correct Rx path
selected, right? Can you please clarify this in the commit log?
So the performance drop fixed for whoever have the vector path supported and
offloads enabled, can be good to highlight in the patch title, otherwise it is
too generic.
>
> Fixes: eff56a7b9f97 ("net/iavf: add offload path for Rx AVX512")
>
I am not clear what caused the performance drop.
Before above patch, vector path was not supporting the offloads and scalar path
should be selected. After above patch, still scalar path selected, although
vector path supports offloads, but for both before and after scalar path is
selected, so why/when the performance drop happens?
Can you please clarify in the commit log, how to reproduce performance drop?
> Signed-off-by: Wenzhuo Lu <wenzhuo...@intel.com>
> ---
> drivers/net/iavf/iavf_rxtx.c | 12 +++++-------
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
> index 3f3cf63..0ba19dbf 100644
> --- a/drivers/net/iavf/iavf_rxtx.c
> +++ b/drivers/net/iavf/iavf_rxtx.c
> @@ -2401,13 +2401,11 @@
> check_ret = iavf_rx_vec_dev_check(dev);
> if (check_ret >= 0 &&
> rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
> - if (check_ret == IAVF_VECTOR_PATH) {
> - use_sse = true;
> - if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) ==
> 1) &&
> - rte_vect_get_max_simd_bitwidth() >=
> RTE_VECT_SIMD_256)
> - use_avx2 = true;
> - }
> + use_sse = true;
> + if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
> + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
> + rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
> + use_avx2 = true;
>
> #ifdef CC_AVX512_SUPPORT
> if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
>
