The ionic PMD only supports Tx queue version 1 or greater.
Version 1 introduced a new SGL format with support for more
fragments per descriptor.
Add release notes and an explanation to the docs.
Signed-off-by: Andrew Boyer <abo...@pensando.io>
---
doc/guides/nics/ionic.rst | 4 ++++
doc/guides/rel_notes/release_21_02.rst | 11 +++++++++++
drivers/net/ionic/ionic_dev.h | 2 +-
drivers/net/ionic/ionic_ethdev.c | 8 ++++----
drivers/net/ionic/ionic_lif.c | 7 ++++++-
drivers/net/ionic/ionic_rxtx.c | 8 ++++----
6 files changed, 30 insertions(+), 10 deletions(-)
diff --git a/doc/guides/nics/ionic.rst b/doc/guides/nics/ionic.rst
index 3b93592c39..0c6147983f 100644
--- a/doc/guides/nics/ionic.rst
+++ b/doc/guides/nics/ionic.rst
@@ -25,6 +25,10 @@ on the host, check for the PCI devices:
b5:00.0 Ethernet controller: Device 1dd8:1002
b6:00.0 Ethernet controller: Device 1dd8:1002
+Firmware Support
+----------------
+
+The ionic PMD requires firmware which supports 16 segment transmit SGLs. This
support was added prior to version 1.0. For help upgrading older versions,
please contact Pensando support.
Building DPDK
-------------
diff --git a/doc/guides/rel_notes/release_21_02.rst
b/doc/guides/rel_notes/release_21_02.rst
index 23dcb370be..76aaf8cbf9 100644
--- a/doc/guides/rel_notes/release_21_02.rst
+++ b/doc/guides/rel_notes/release_21_02.rst
@@ -138,6 +138,17 @@ New Features
* Added support for aes-cbc sha256-128-hmac cipher combination in OCTEON TX2
crypto PMD lookaside protocol offload for IPsec.
+* **Updated the Pensando ionic driver.**
+
+ Updated the Pensando ionic driver with new features and improvements,
including:
+
+ * Fixed bugs related to link autonegotiation.
+ * Fixed bugs related to port start/stop and queue start/stop.
+ * Added support for probing the supported queue versions. Note that
+ extremely old (pre-1.0) firmware will no longer be usable with the PMD.
+ * Removed unused code.
+ * Reduced device startup time.
+
Removed Items
-------------
diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index e13b6c82cc..bacbe3f053 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -107,7 +107,7 @@ static inline void ionic_struct_size_checks(void)
/* I/O */
RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_desc) != 16);
- RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_sg_desc) != 128);
+ RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_sg_desc_v1) != 256);
RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_comp) != 16);
RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_desc) != 16);
diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index 747082a263..83c9dd690a 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -70,12 +70,12 @@ static const struct rte_eth_desc_lim rx_desc_lim = {
.nb_align = 1,
};
-static const struct rte_eth_desc_lim tx_desc_lim = {
+static const struct rte_eth_desc_lim tx_desc_lim_v1 = {
.nb_max = IONIC_MAX_RING_DESC,
.nb_min = IONIC_MIN_RING_DESC,
.nb_align = 1,
- .nb_seg_max = IONIC_TX_MAX_SG_ELEMS,
- .nb_mtu_seg_max = IONIC_TX_MAX_SG_ELEMS,
+ .nb_seg_max = IONIC_TX_MAX_SG_ELEMS_V1,
+ .nb_mtu_seg_max = IONIC_TX_MAX_SG_ELEMS_V1,
};
static const struct eth_dev_ops ionic_eth_dev_ops = {
@@ -440,7 +440,7 @@ ionic_dev_info_get(struct rte_eth_dev *eth_dev,
0;
dev_info->rx_desc_lim = rx_desc_lim;
- dev_info->tx_desc_lim = tx_desc_lim;
+ dev_info->tx_desc_lim = tx_desc_lim_v1;
/* Driver-preferred Rx/Tx parameters */
dev_info->default_rxportconf.burst_size = 32;
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 8dd49b6628..2a6c494c9d 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -761,7 +761,7 @@ ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t index,
uint16_t ntxq_descs,
ntxq_descs,
sizeof(struct ionic_txq_desc),
sizeof(struct ionic_txq_comp),
- sizeof(struct ionic_txq_sg_desc),
+ sizeof(struct ionic_txq_sg_desc_v1),
&lif->txqcqs[index]);
if (err)
return err;
@@ -925,6 +925,11 @@ ionic_lif_alloc(struct ionic_lif *lif)
ionic_lif_queue_identify(lif);
+ if (lif->qtype_info[IONIC_QTYPE_TXQ].version < 1) {
+ IONIC_PRINT(ERR, "FW too old, please upgrade");
+ return -ENXIO;
+ }
+
IONIC_PRINT(DEBUG, "Allocating Lif Info");
rte_spinlock_init(&lif->adminq_lock);
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index c8191e6c01..b8b3364d11 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -317,9 +317,9 @@ static struct ionic_txq_desc *
ionic_tx_tso_next(struct ionic_queue *q, struct ionic_txq_sg_elem **elem)
{
struct ionic_txq_desc *desc_base = q->base;
- struct ionic_txq_sg_desc *sg_desc_base = q->sg_base;
+ struct ionic_txq_sg_desc_v1 *sg_desc_base = q->sg_base;
struct ionic_txq_desc *desc = &desc_base[q->head_idx];
- struct ionic_txq_sg_desc *sg_desc = &sg_desc_base[q->head_idx];
+ struct ionic_txq_sg_desc_v1 *sg_desc = &sg_desc_base[q->head_idx];
*elem = sg_desc->elems;
return desc;
@@ -456,9 +456,9 @@ ionic_tx(struct ionic_qcq *txq, struct rte_mbuf *txm,
{
struct ionic_queue *q = &txq->q;
struct ionic_txq_desc *desc_base = q->base;
- struct ionic_txq_sg_desc *sg_desc_base = q->sg_base;
+ struct ionic_txq_sg_desc_v1 *sg_desc_base = q->sg_base;
struct ionic_txq_desc *desc = &desc_base[q->head_idx];
- struct ionic_txq_sg_desc *sg_desc = &sg_desc_base[q->head_idx];
+ struct ionic_txq_sg_desc_v1 *sg_desc = &sg_desc_base[q->head_idx];
struct ionic_txq_sg_elem *elem = sg_desc->elems;
struct ionic_tx_stats *stats = IONIC_Q_TO_TX_STATS(q);
struct rte_mbuf *txm_seg;
--
2.17.1
