-----Original Message-----
From: Ferruh Yigit <ferruh.yi...@intel.com>
Sent: Tuesday, January 26, 2021 9:01 PM
To: Pradeep Kumar Nalla <pna...@marvell.com>; Radha Chintakuntla
<rad...@marvell.com>; Veerasenareddy Burru <vbu...@marvell.com>
Cc: Jerin Jacob Kollanukkaran <jer...@marvell.com>; dev@dpdk.org; Satananda
Burla <sbu...@marvell.com>
Subject: [EXT] Re: [dpdk-dev] [PATCH v2 05/11] net/octeontx_ep: Add dev info
get and configure
External Email
----------------------------------------------------------------------
On 1/18/2021 9:35 AM, Nalla Pradeep wrote:
> Add device information get and device configure operations.
>
> Signed-off-by: Nalla Pradeep <pna...@marvell.com>
<...>
> +static int
> +otx_ep_dev_info_get(struct rte_eth_dev *eth_dev,
> + struct rte_eth_dev_info *devinfo) {
> + struct otx_ep_device *otx_epvf;
> + struct rte_pci_device *pdev;
> + uint32_t dev_id;
> +
> + otx_epvf = OTX_EP_DEV(eth_dev);
> + pdev = otx_epvf->pdev;
> + dev_id = pdev->id.device_id;
> +
> + devinfo->speed_capa = ETH_LINK_SPEED_10G;
>Is it always 10G independent from the device type and PHY?
Right now it is fixed for 10G. When communication infrastructure is
incorporated with PF, will get information from PF.
>Also can you please update the featutes file, octeontx_ep.ini, as the same
>patch features are >added.
>For example the 'Speed capabilities' feature can be set as P (partially
>supported) with this patch.
> + devinfo->max_rx_queues = otx_epvf->max_rx_queues;
> + devinfo->max_tx_queues = otx_epvf->max_tx_queues;
> +
> + devinfo->min_rx_bufsize = OTX_EP_MIN_RX_BUF_SIZE;
> + if (dev_id == PCI_DEVID_OCTEONTX_EP_VF ||
> + dev_id == PCI_DEVID_OCTEONTX2_EP_NET_VF ||
> + dev_id == PCI_DEVID_CN98XX_EP_NET_VF) {
> + devinfo->max_rx_pktlen = OTX_EP_MAX_PKT_SZ;
> + devinfo->rx_offload_capa = DEV_RX_OFFLOAD_JUMBO_FRAME;
> + devinfo->rx_offload_capa |= DEV_RX_OFFLOAD_SCATTER;
> + devinfo->tx_offload_capa = DEV_TX_OFFLOAD_MULTI_SEGS;
> + }
The above list seems all the devices this driver probes, is there a reason to
check for them?
<...>
> +static int
> +otx_ep_dev_configure(struct rte_eth_dev *eth_dev) {
> + struct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);
> + struct rte_eth_dev_data *data = eth_dev->data;
> + struct rte_eth_rxmode *rxmode;
> + struct rte_eth_txmode *txmode;
> + struct rte_eth_conf *conf;
> + uint32_t ethdev_queues;
> +
> + conf = &data->dev_conf;
> + rxmode = &conf->rxmode;
> + txmode = &conf->txmode;
> + ethdev_queues = (uint32_t)(otx_epvf->sriov_info.rings_per_vf);
> + if (eth_dev->data->nb_rx_queues > ethdev_queues ||
> + eth_dev->data->nb_tx_queues > ethdev_queues) {
In dev_info, 'max_rx_queues' & 'max_tx_queues' set by 'otx_epvf->max_rx_queues'
& 'otx_epvf->max_tx_queues' respectively, but here they are checked against
'otx_epvf->sriov_info.rings_per_vf' are they same values? Or should dev_info
chaged to set correct limits?
