On Mon, Jan 18, 2021 at 3:07 PM Nalla Pradeep <pna...@marvell.com> wrote: > > Functions to setup device, basic IQ and OQ registers are added. > > Signed-off-by: Nalla Pradeep <pna...@marvell.com> > --- > drivers/net/octeontx_ep/meson.build | 2 + > drivers/net/octeontx_ep/otx2_ep_vf.c | 138 +++++++++++++++++++++ > drivers/net/octeontx_ep/otx2_ep_vf.h | 11 ++ > drivers/net/octeontx_ep/otx_ep_common.h | 92 ++++++++++++++ > drivers/net/octeontx_ep/otx_ep_ethdev.c | 10 ++ > drivers/net/octeontx_ep/otx_ep_vf.c | 154 ++++++++++++++++++++++++ > drivers/net/octeontx_ep/otx_ep_vf.h | 33 +++++ > 7 files changed, 440 insertions(+) > create mode 100644 drivers/net/octeontx_ep/otx2_ep_vf.c > create mode 100644 drivers/net/octeontx_ep/otx2_ep_vf.h > create mode 100644 drivers/net/octeontx_ep/otx_ep_vf.c > > diff --git a/drivers/net/octeontx_ep/meson.build > b/drivers/net/octeontx_ep/meson.build > index 06663de4e2..7c43c077cf 100644 > --- a/drivers/net/octeontx_ep/meson.build > +++ b/drivers/net/octeontx_ep/meson.build > @@ -4,6 +4,8 @@ > > sources = files( > 'otx_ep_ethdev.c', > + 'otx_ep_vf.c', > + 'otx2_ep_vf.c', > ) > > extra_flags = [] > diff --git a/drivers/net/octeontx_ep/otx2_ep_vf.c > b/drivers/net/octeontx_ep/otx2_ep_vf.c > new file mode 100644 > index 0000000000..e03d39f7dc > --- /dev/null > +++ b/drivers/net/octeontx_ep/otx2_ep_vf.c > @@ -0,0 +1,138 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(C) 2020 Marvell. > + */ > + > +#include "otx2_common.h" > +#include "otx_ep_common.h" > +#include "otx2_ep_vf.h" > + > +static void > +otx2_vf_setup_global_iq_reg(struct otx_ep_device *otx_ep, int q_no) > +{ > + volatile uint64_t reg_val = 0ull; > + > + /* Select ES, RO, NS, RDSIZE,DPTR Format#0 for IQs > + * IS_64B is by default enabled. > + */ > + reg_val = otx2_read64(otx_ep->hw_addr + SDP_VF_R_IN_CONTROL(q_no)); > + > + reg_val |= SDP_VF_R_IN_CTL_RDSIZE; > + reg_val |= SDP_VF_R_IN_CTL_IS_64B; > + reg_val |= SDP_VF_R_IN_CTL_ESR; > + > + otx2_write64(reg_val, otx_ep->hw_addr + SDP_VF_R_IN_CONTROL(q_no)); > +} > + > +static void > +otx2_vf_setup_global_oq_reg(struct otx_ep_device *otx_ep, int q_no) > +{ > + volatile uint64_t reg_val = 0ull; > + > + reg_val = otx2_read64(otx_ep->hw_addr + SDP_VF_R_OUT_CONTROL(q_no)); > + > +#if defined(BUFPTR_ONLY_MODE)
Use devargs instead of compile-time flags. > + reg_val &= ~(SDP_VF_R_OUT_CTL_IMODE); > +#else > + reg_val |= (SDP_VF_R_OUT_CTL_IMODE); > +#endif