This patch provides the UAR allocation workaround for the
hosts where UAR allocation with Write-Combining memory
mapping type fails.
Fixes: 8395927cdfaf ("vdpa/mlx5: prepare HW queues")
Cc: sta...@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
Acked-by: Matan Azrad <ma...@nvidia.com>
---
drivers/vdpa/mlx5/mlx5_vdpa_event.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_event.c
b/drivers/vdpa/mlx5/mlx5_vdpa_event.c
index 010543c..3aeaeb8 100644
--- a/drivers/vdpa/mlx5/mlx5_vdpa_event.c
+++ b/drivers/vdpa/mlx5/mlx5_vdpa_event.c
@@ -77,7 +77,12 @@
DRV_LOG(ERR, "Failed to change event channel FD.");
goto error;
}
- priv->uar = mlx5_glue->devx_alloc_uar(priv->ctx, 0);
+ /*
+ * This PMD always claims the write memory barrier on UAR
+ * registers writings, it is safe to allocate UAR with any
+ * memory mapping type.
+ */
+ priv->uar = mlx5_devx_alloc_uar(priv->ctx, -1);
if (!priv->uar) {
rte_errno = errno;
DRV_LOG(ERR, "Failed to allocate UAR.");
--
1.8.3.1
