> -----Original Message-----
> From: Power, Ciara <ciara.po...@intel.com>
> Sent: Wednesday, September 30, 2020 6:04 AM
> To: dev@dpdk.org
> Cc: Power, Ciara <ciara.po...@intel.com>; Wang, Yipeng1
> <yipeng1.w...@intel.com>; Gobriel, Sameh <sameh.gobr...@intel.com>
> Subject: [PATCH v3 15/18] member: add checks for max SIMD bitwidth
> 
> When choosing a vector path to take, an extra condition must be satisfied to
> ensure the max SIMD bitwidth allows for the CPU enabled path.
> 
> Cc: Yipeng Wang <yipeng1.w...@intel.com>
> Cc: Sameh Gobriel <sameh.gobr...@intel.com>
> 
> Signed-off-by: Ciara Power <ciara.po...@intel.com>
> ---
>  lib/librte_member/rte_member_ht.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/librte_member/rte_member_ht.c
> b/lib/librte_member/rte_member_ht.c
> index cbcd0d4407..71e3cf7b52 100644
> --- a/lib/librte_member/rte_member_ht.c
> +++ b/lib/librte_member/rte_member_ht.c
> @@ -113,7 +113,8 @@ rte_member_create_ht(struct rte_member_setsum
> *ss,
>       }
>  #if defined(RTE_ARCH_X86)
>       if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) &&
> -                     RTE_MEMBER_BUCKET_ENTRIES == 16)
> +                     RTE_MEMBER_BUCKET_ENTRIES == 16 &&
> +                     rte_get_max_simd_bitwidth() >=
> RTE_MAX_256_SIMD)
>               ss->sig_cmp_fn = RTE_MEMBER_COMPARE_AVX2;
>       else
>  #endif
> --
> 2.17.1
[Wang, Yipeng] 
Acked-by: Yipeng Wang <yipeng1.w...@intel.com>

Reply via email to