> -----Original Message-----
> From: Power, Ciara <ciara.po...@intel.com>
> Sent: Wednesday, September 30, 2020 6:04 AM
> To: dev@dpdk.org
> Cc: Power, Ciara <ciara.po...@intel.com>; Marohn, Byron
> <byron.mar...@intel.com>; Wang, Yipeng1 <yipeng1.w...@intel.com>
> Subject: [PATCH v3 16/18] efd: add checks for max SIMD bitwidth
>
> When choosing a vector path to take, an extra condition must be satisfied to
> ensure the max SIMD bitwidth allows for the CPU enabled path.
>
> Cc: Byron Marohn <byron.mar...@intel.com>
> Cc: Yipeng Wang <yipeng1.w...@intel.com>
>
> Signed-off-by: Ciara Power <ciara.po...@intel.com>
> ---
> lib/librte_efd/rte_efd.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/lib/librte_efd/rte_efd.c b/lib/librte_efd/rte_efd.c index
> 6a799556d4..509ecc8256 100644
> --- a/lib/librte_efd/rte_efd.c
> +++ b/lib/librte_efd/rte_efd.c
> @@ -645,7 +645,9 @@ rte_efd_create(const char *name, uint32_t
> max_num_rules, uint32_t key_len,
> * For less than 4 bits, scalar function performs better
> * than vectorised version
> */
> - if (RTE_EFD_VALUE_NUM_BITS > 3 &&
> rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
> + if (RTE_EFD_VALUE_NUM_BITS > 3
> + && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)
> + && rte_get_max_simd_bitwidth() >=
> RTE_MAX_256_SIMD)
> table->lookup_fn = EFD_LOOKUP_AVX2;
> else
> #endif
> @@ -655,7 +657,8 @@ rte_efd_create(const char *name, uint32_t
> max_num_rules, uint32_t key_len,
> * than vectorised version
> */
> if (RTE_EFD_VALUE_NUM_BITS > 16 &&
> - rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
> + rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON) &&
> + rte_get_max_simd_bitwidth() >=
> RTE_MAX_128_SIMD)
> table->lookup_fn = EFD_LOOKUP_NEON;
> else
> #endif
> --
> 2.17.1
[Wang, Yipeng]
Acked-by: Yipeng Wang <yipeng1.w...@intel.com>
