17/07/2020 17:23, Slava Ovsiienko: > > > -----Original Message----- > > From: Thomas Monjalon <tho...@monjalon.net> > > Sent: Friday, July 17, 2020 18:19 > > To: Slava Ovsiienko <viachesl...@mellanox.com> > > Cc: dev@dpdk.org; Matan Azrad <ma...@mellanox.com>; Raslan > > Darawsheh <rasl...@mellanox.com> > > Subject: Re: [PATCH 3/3] common/mlx5: fix DevX register access opcode > > > > 17/07/2020 17:11, Slava Ovsiienko: > > > From: Thomas Monjalon <tho...@monjalon.net> > > > > 17/07/2020 16:28, Viacheslav Ovsiienko: > > > > > The dedicated MLX5_CMD_OP_ACCESS_REGISTER_USER opcode must > > be > > > > used to > > > > > read hardware register content from unprotected mode. > > > > > > > > Otherwise? What was broken? > > > > > > Otherwise the MLX5_CMD_OP_ACCESS_REGISTER was used, it returned > > > EINVAL and register value was not read. It was supposed to enable > > > ACCESS_REGISTER operation from user mode in kernel driver to read > > > registers, but eventually it was replaced with ACCESS_REGISTER_USER > > dedicated operation. > > > > > > mlx5 PMD does not rely on this feature strongly, if register reading > > > fails it deduces the timestamp mode from reported timestamp counter > > > frequency. > > > > OK I think some of these explanations deserve to be in the commit log. > > M-m-m-m, this is quite tiny 2-lines fix, we are going to squash it before > rc2 😊 > OK, will add the comment about dedicated opcode.
If the patch is squashed with the root cause, no need to explain indeed.
