On 6/24/2020 1:46 PM, Harman Kalra wrote: > New cn98xx SOC comes up with two NIX blocks wrt > cn96xx, cn93xx, to achieve higher performance. > Also the no of cores increased to 36 from 24. > > Adding support for cn98xx where need a logic to > detect if the LF is attached to NIX0 or NIX1 and > then accordingly use the respective NIX block. > > Signed-off-by: Harman Kalra <hka...@marvell.com> > --- > *V2: updated make/meson configs with the increased no of > cores.
Since this is new SoC support I think can be good to highlight in the release notes, what do you think?
