ACK
-----Original Message-----
From: Ye, Xiaolong <xiaolong...@intel.com>
Sent: Monday, December 16, 2019 3:44 AM
To: Xing, Beilei <beilei.x...@intel.com>; Zhang, Qi Z <qi.z.zh...@intel.com>
Cc: dev@dpdk.org; Stillwell Jr, Paul M <paul.m.stillwell...@intel.com>; Ye,
Xiaolong <xiaolong...@intel.com>; Kwapulinski, Piotr
<piotr.kwapulin...@intel.com>
Subject: [PATCH v3 33/36] net/i40e/base: introduce firmware EMP reset register
offsets
Introduce offsets of firmware registers holding a number of EMP resets.
Implement offsets as a preprocessor's constants.
Required by drivers to read a number of EMP resets reported by FW.
Signed-off-by: Piotr Kwapulinski <piotr.kwapulin...@intel.com>
Signed-off-by: Xiaolong Ye <xiaolong...@intel.com>
---
drivers/net/i40e/base/i40e_register.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/i40e/base/i40e_register.h
b/drivers/net/i40e/base/i40e_register.h
index 3a8c0ccd1..436f48efa 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -366,6 +366,8 @@
#define I40E_GL_FWSTS_FWRI_MASK I40E_MASK(0x1, I40E_GL_FWSTS_FWRI_SHIFT)
#define I40E_GL_FWSTS_FWS1B_SHIFT 16
#define I40E_GL_FWSTS_FWS1B_MASK I40E_MASK(0xFF, I40E_GL_FWSTS_FWS1B_SHIFT)
+#define I40E_GL_FWSTS_FWS1B_EMPR_0 I40E_MASK(0x20,
+I40E_GL_FWSTS_FWS1B_SHIFT) #define I40E_GL_FWSTS_FWS1B_EMPR_10
+I40E_MASK(0x2A, I40E_GL_FWSTS_FWS1B_SHIFT)
#define I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_CORER_MASK \
I40E_MASK(0x30, I40E_GL_FWSTS_FWS1B_SHIFT)
#define I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_GLOBR_MASK \
--
2.17.1
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