On Wed, Nov 20, 2019 at 10:26 AM <pbhagavat...@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavat...@marvell.com>
>
> Fix HW race condition observed when timeout resolution is low (<5us).
> When HW traverses a given TIM bucket it will clear chunk_remainder,
> but since SW always decreases the chunk_remainder at the start of the
> arm routine it might cause a race where SW updates chunk_remainder
> after HW has cleared it that lead to nasty side effects.
>
> Fixes: 95e4e4ec7469 ("event/octeontx2: add timer arm timeout burst")
>
> Signed-off-by: Pavan Nikhilesh <pbhagavat...@marvell.com>Please fix the build issue with x86_32 with this series. https://travis-ci.com/ovsrobot/dpdk/jobs/258482444 drivers/event/octeontx2/otx2_tim_worker.h: In function ‘tim_add_entry_sp’: drivers/common/octeontx2/otx2_common.h:31:26: error: left shift count >= width of type [-Werror=shift-count-overflow] 31 | #define BIT(nr) (1UL << (nr)) | ^~ drivers/event/octeontx2/otx2_tim_worker.h:265:25: note: in expansion of macro ‘BIT’ 265 | } while (hbt_state & BIT(33)); | ^~~ drivers/common/octeontx2/otx2_common.h:31:26: error: left shift count >= width of type [-Werror=shift-count-overflow] 31 | #define BIT(nr) (1UL << (nr)) | ^~ drivers/event/octeontx2/otx2_tim_worker.h:268:22: note: in expansion of macro ‘BIT’ 268 | if (!(hbt_state & BIT(34))) { | ^~~ drivers/event/octeontx2/otx2_tim_worker.h: In function ‘tim_add_entry_mp’: drivers/common/octeontx2/otx2_common.h:31:26: error: left shift count >= width of type [-Werror=shift-count-overflow] 31 | #define BIT(nr) (1UL << (nr))
