On Fri, 18 Dec 2015 09:52:29 +0000 "Xie, Huawei" <huawei.xie at intel.com> wrote:
> > low level SSE bit twiddling. > Hi Stephen: > We only did SSE twiddling to RX, which almost doubles the performance > comparing to normal path in virtio/vhost performance test case. Indirect > and any layout feature enabling are mostly for TX. We also did some > optimization for single segment and non-offload case in TX, without > using SSE, which also gives ~60% performance improvement, in Qian's > result. My optimization is mostly for single segment and non-offload > case, which i calls simple rx/tx. > I plan to add virtio/vhost performance benchmark so that we could easily > measure the performance difference for each patch. > > Indirect and any layout features are useful for multiple segment > transmitted packet mbufs. I had acked your patch at the first time, and > thought it is applied. I don't understand why you say it is ignored by > Intel. Sorry, did not mean to blame Intel, ... more that why didn't it get in 2.2? It turns out any layout/indirect helps all transmits because they can then take a single tx descriptor rather than multiple.
