12/07/2019 14:37, Jerin Jacob Kollanukkaran: > > -----Original Message----- > > From: Nithin Dabilpuram <ndabilpu...@marvell.com> > > Sent: Friday, July 12, 2019 2:56 PM > > To: Jerin Jacob Kollanukkaran <jer...@marvell.com>; Nithin Kumar > > Dabilpuram <ndabilpu...@marvell.com>; Vamsi Krishna Attunuru > > <vattun...@marvell.com>; John McNamara <john.mcnam...@intel.com>; > > Marko Kovacevic <marko.kovace...@intel.com>; Kiran Kumar Kokkilagadda > > <kirankum...@marvell.com> > > Cc: dev@dpdk.org > > Subject: [PATCH v2] common/octeontx2: add CNF95xx SoC support > > > > Update platform support of CNF95xx in documentation and also, update the > > HW cap based on PCI subsystem id and revision id. > > This patch also changes HW capability handling to be based on PCI Revision > > ID. PCI Revision ID contains a unique identifier to identify chip, major and > > minor revisions. > > > > Signed-off-by: Nithin Dabilpuram <ndabilpu...@marvell.com> > > Signed-off-by: Jerin Jacob <jer...@marvell.com> > > Acked-by: Jerin Jacob <jer...@marvell.com>
Applied, thanks
