existing rte_bitmap library implementation optimally configured to run on
64-bytes cache line, extending to 128-bytes cache line targets.
Signed-off-by: Jerin Jacob <jerin.jacob at caviumnetworks.com>
---
lib/librte_sched/rte_bitmap.h | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/lib/librte_sched/rte_bitmap.h b/lib/librte_sched/rte_bitmap.h
index 3d911e4..e6cf26e 100644
--- a/lib/librte_sched/rte_bitmap.h
+++ b/lib/librte_sched/rte_bitmap.h
@@ -45,10 +45,10 @@ extern "C" {
* The bitmap component provides a mechanism to manage large arrays of bits
* through bit get/set/clear and bit array scan operations.
*
- * The bitmap scan operation is optimized for 64-bit CPUs using 64-byte cache
+ * The bitmap scan operation is optimized for 64-bit CPUs using 64/128 byte
cache
* lines. The bitmap is hierarchically organized using two arrays (array1 and
* array2), with each bit in array1 being associated with a full cache line
- * (512 bits) of bitmap bits, which are stored in array2: the bit in array1 is
+ * (512/1024 bits) of bitmap bits, which are stored in array2: the bit in
array1 is
* set only when there is at least one bit set within its associated array2
* bits, otherwise the bit in array1 is cleared. The read and write operations
* for array1 and array2 are always done in slabs of 64 bits.
@@ -81,11 +81,17 @@ extern "C" {
/* Cache line (CL) */
#define RTE_BITMAP_CL_BIT_SIZE (RTE_CACHE_LINE_SIZE * 8)
+
+#if RTE_CACHE_LINE_SIZE == 64
#define RTE_BITMAP_CL_BIT_SIZE_LOG2 9
+#elif RTE_CACHE_LINE_SIZE == 128
+#define RTE_BITMAP_CL_BIT_SIZE_LOG2 10
+#endif
+
#define RTE_BITMAP_CL_BIT_MASK (RTE_BITMAP_CL_BIT_SIZE - 1)
#define RTE_BITMAP_CL_SLAB_SIZE (RTE_BITMAP_CL_BIT_SIZE /
RTE_BITMAP_SLAB_BIT_SIZE)
-#define RTE_BITMAP_CL_SLAB_SIZE_LOG2 3
+#define RTE_BITMAP_CL_SLAB_SIZE_LOG2 (RTE_BITMAP_CL_BIT_SIZE_LOG2
- RTE_BITMAP_SLAB_BIT_SIZE_LOG2)
#define RTE_BITMAP_CL_SLAB_MASK (RTE_BITMAP_CL_SLAB_SIZE - 1)
/** Bitmap data structure */
--
2.1.0
