Hello,
Is there any way to disable the generation of “vmovdqa64” instruction during
the compilation of dpdk library on Intel Skylake CPU?
My dev VM uses Intel Skylake CPU while my test machine uses Intel uses Intel(R)
Xeon(R) CPU E5-2630 v4 that is some sort of Intel Broadwell CPU.
And my generated executable file of dpdk application contains "vmovdqa64"
instruction that is NOT supported in Intel Broadwell CPU so my dpdk application
fails to be run.
I tried MACHINE_CFLAGS= -march=native/broadwell/ivybridge within
dpdk-stable-17.11.2/mk/machine/native/rte.vars.mk, however it does not work.
Additionally, my gcc version is gcc (Debian 4.9.2-10+deb8u1) 4.9.2.
- My dev VM
zhuangyan@devbox-zhuangyan:~/my-dpdk$ lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 4
On-line CPU(s) list: 0-3
Thread(s) per core: 1
Core(s) per socket: 1
Socket(s): 4
NUMA node(s): 1
Vendor ID: GenuineIntel
CPU family: 6
Model: 85
Model name: Intel Xeon Processor (Skylake, IBRS)
Stepping: 4
CPU MHz: 2294.608
BogoMIPS: 4589.21
Hypervisor vendor: KVM
Virtualization type: full
L1d cache: 32K
L1i cache: 32K
L2 cache: 4096K
L3 cache: 16384K
NUMA node0 CPU(s): 0-3
- My test VM
root@n10-023-013:~# lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 40
On-line CPU(s) list: 0-39
Thread(s) per core: 2
Core(s) per socket: 10
Socket(s): 2
NUMA node(s): 2
Vendor ID: GenuineIntel
CPU family: 6
Model: 79
Model name: Intel(R) Xeon(R) CPU E5-2630 v4 @ 2.20GHz
Stepping: 1
CPU MHz: 2401.281
CPU max MHz: 3100.0000
CPU min MHz: 1200.0000
BogoMIPS: 4401.20
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 25600K
NUMA node0 CPU(s): 0-9,20-29
NUMA node1 CPU(s): 10-19,30-39
zhuangyan@devbox-zhuangyan:~/ttgw-3/bin$ grep -rn "vmovdqa64" ttgw-obj
346885: 5463ab: 62 f1 fd 48 6f 3d 4b vmovdqa64 0x9bd4b(%rip),%zmm7
# 5e2100 <__func__.24871+0x60>
346889: 5463c2: 62 f1 fd 48 6f 15 f4 vmovdqa64 0x9bcf4(%rip),%zmm2
# 5e20c0 <__func__.24871+0x20>
346891: 5463cc: 62 f1 fd 48 6f 25 6a vmovdqa64 0x9bd6a(%rip),%zmm4
# 5e2140 <__func__.24871+0xa0>
346893: 5463d6: 62 f1 fd 48 6f 1d a0 vmovdqa64 0x9bda0(%rip),%zmm3
# 5e2180 <__func__.24871+0xe0>
346896: 5463e6: 62 f1 fd 48 6f f4 vmovdqa64 %zmm4,%zmm6
346898: 5463f2: 62 e1 fd 48 6f c3 vmovdqa64 %zmm3,%zmm16
346899: 5463f8: 62 e1 fd 48 6f cb vmovdqa64 %zmm3,%zmm17
346906: 546424: 62 f1 fd 48 6f cc vmovdqa64 %zmm4,%zmm1
. . .
Regards,
Yan(Andrew) Zhuang
zhuang...@bytedance.com
