+Justin He

> -----Original Message-----
> From: Gavin Hu <gavin...@arm.com>
> Sent: Monday, September 17, 2018 4:17 PM
> To: dev@dpdk.org
> Cc: Gavin Hu (Arm Technology China) <gavin...@arm.com>; Honnappa
> Nagarahalli <honnappa.nagaraha...@arm.com>; Steve Capper
> <steve.cap...@arm.com>; Ola Liljedahl <ola.liljed...@arm.com>;
> jerin.ja...@caviumnetworks.com; nd <n...@arm.com>; sta...@dpdk.org
> Subject: [PATCH v3 1/3] ring: read tail using atomic load
> 
> In update_tail, read ht->tail using __atomic_load.Although the compiler
> currently seems to be doing the right thing even without _atomic_load, we
> don't want to give the compiler freedom to optimise what should be an
> atomic load, it should not be arbitarily moved around.
> 
> Fixes: 39368ebfc6 ("ring: introduce C11 memory model barrier option")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Gavin Hu <gavin...@arm.com>
> Reviewed-by: Honnappa Nagarahalli <honnappa.nagaraha...@arm.com>
> Reviewed-by: Steve Capper <steve.cap...@arm.com>
> Reviewed-by: Ola Liljedahl <ola.liljed...@arm.com>
> ---
>  lib/librte_ring/rte_ring_c11_mem.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/librte_ring/rte_ring_c11_mem.h
> b/lib/librte_ring/rte_ring_c11_mem.h
> index 94df3c4..234fea0 100644
> --- a/lib/librte_ring/rte_ring_c11_mem.h
> +++ b/lib/librte_ring/rte_ring_c11_mem.h
> @@ -21,7 +21,8 @@ update_tail(struct rte_ring_headtail *ht, uint32_t
> old_val, uint32_t new_val,
>        * we need to wait for them to complete
>        */
>       if (!single)
> -             while (unlikely(ht->tail != old_val))
> +             while (unlikely(old_val != __atomic_load_n(&ht->tail,
> +                                             __ATOMIC_RELAXED)))
>                       rte_pause();
> 
>       __atomic_store_n(&ht->tail, new_val, __ATOMIC_RELEASE);
> --
> 2.7.4

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