From: Ankur Dwivedi <ankur.dwiv...@caviumnetworks.com>
This adds Makefile, meson.build and config file options.
Also adds the version map files and maintainers
file to claim responsibility.
Signed-off-by: Ankur Dwivedi <ankur.dwiv...@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.jos...@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.mur...@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpu...@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayara...@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssriniva...@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejas...@caviumnetworks.com>
---
MAINTAINERS | 7 ++++
config/common_base | 5 +++
drivers/crypto/Makefile | 1 +
drivers/crypto/meson.build | 2 +-
drivers/crypto/octeontx/Makefile | 37 ++++++++++++++++++++++
drivers/crypto/octeontx/meson.build | 12 +++++++
.../octeontx/rte_pmd_octeontx_crypto_version.map | 4 +++
mk/rte.app.mk | 1 +
8 files changed, 68 insertions(+), 1 deletion(-)
create mode 100644 drivers/crypto/octeontx/Makefile
create mode 100644 drivers/crypto/octeontx/meson.build
create mode 100644 drivers/crypto/octeontx/rte_pmd_octeontx_crypto_version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 9fd258f..09548fa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -771,6 +771,13 @@ F: drivers/crypto/armv8/
F: doc/guides/cryptodevs/armv8.rst
F: doc/guides/cryptodevs/features/armv8.ini
+Cavium OcteonTX
+M: Anoob Joseph <anoob.jos...@caviumnetworks.com>
+F: drivers/common/cpt/
+F: drivers/crypto/octeontx/
+F: doc/guides/cryptodevs/octeontx.rst
+F: doc/guides/cryptodevs/features/octeontx.ini
+
Crypto Scheduler
M: Fan Zhang <roy.fan.zh...@intel.com>
F: drivers/crypto/scheduler/
diff --git a/config/common_base b/config/common_base
index 4bcbaf9..4c6a951 100644
--- a/config/common_base
+++ b/config/common_base
@@ -635,6 +635,11 @@ CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=n
CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n
#
+# Compile PMD for Cavium OcteonTX crypto device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y
+
+#
# Compile raw device support
# EXPERIMENTAL: API may change without prior notice
#
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index c480cbd..c083e64 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -7,6 +7,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_GCM) += aesni_gcm
DIRS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += aesni_mb
DIRS-$(CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO) += armv8
DIRS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += ccp
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += octeontx
DIRS-$(CONFIG_RTE_LIBRTE_PMD_OPENSSL) += openssl
DIRS-$(CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER) += scheduler
DIRS-$(CONFIG_RTE_LIBRTE_PMD_SNOW3G) += snow3g
diff --git a/drivers/crypto/meson.build b/drivers/crypto/meson.build
index d64ca41..2187870 100644
--- a/drivers/crypto/meson.build
+++ b/drivers/crypto/meson.build
@@ -2,7 +2,7 @@
# Copyright(c) 2017 Intel Corporation
drivers = ['ccp', 'dpaa_sec', 'dpaa2_sec', 'mvsam',
- 'null', 'openssl', 'qat', 'virtio']
+ 'null', 'octeontx', 'openssl', 'qat', 'virtio']
std_deps = ['cryptodev'] # cryptodev pulls in all other needed deps
config_flag_fmt = 'RTE_LIBRTE_@0@_PMD'
diff --git a/drivers/crypto/octeontx/Makefile b/drivers/crypto/octeontx/Makefile
new file mode 100644
index 0000000..65bd02f
--- /dev/null
+++ b/drivers/crypto/octeontx/Makefile
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Cavium, Inc
+#
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+# library name
+LIB = librte_pmd_octeontx_crypto.a
+
+# library version
+LIBABIVER := 1
+
+# build flags
+CFLAGS += $(WERROR_FLAGS)
+
+LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
+LDLIBS += -lrte_cryptodev
+LDLIBS += -lrte_pci -lrte_bus_pci
+
+VPATH += $(RTE_SDK)/drivers/crypto/octeontx
+
+CFLAGS += -O3 -DCPT_MODEL=CRYPTO_OCTEONTX
+
+# export include files
+SYMLINK-y-include +=
+
+# versioning export map
+EXPORT_MAP := rte_pmd_octeontx_crypto_version.map
+
+# library dependencies
+DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += lib/librte_eal
+DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += lib/librte_cryptodev
+DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += lib/librte_mempool
+DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += lib/librte_mbuf
+DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += lib/librte_malloc
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/crypto/octeontx/meson.build
b/drivers/crypto/octeontx/meson.build
new file mode 100644
index 0000000..261bb77
--- /dev/null
+++ b/drivers/crypto/octeontx/meson.build
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Cavium, Inc
+if host_machine.system() != 'linux'
+ build = false
+endif
+
+deps += ['bus_pci']
+name = 'octeontx_crypto'
+
+sources = files()
+
+cflags += '-DCPT_MODEL=CRYPTO_OCTEONTX'
diff --git a/drivers/crypto/octeontx/rte_pmd_octeontx_crypto_version.map
b/drivers/crypto/octeontx/rte_pmd_octeontx_crypto_version.map
new file mode 100644
index 0000000..521e51f
--- /dev/null
+++ b/drivers/crypto/octeontx/rte_pmd_octeontx_crypto_version.map
@@ -0,0 +1,4 @@
+DPDK_18.11 {
+
+ local: *;
+};
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index de33883..b530337 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -211,6 +211,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ZUC) +=
-L$(LIBSSO_ZUC_PATH)/build -lsso
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO) += -lrte_pmd_armv8
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO) += -L$(ARMV8_CRYPTO_LIB_PATH)
-larmv8_crypto
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO) += -L$(LIBMUSDK_PATH)/lib
-lrte_pmd_mvsam_crypto -lmusdk
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += -lrte_pmd_octeontx_crypto
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER) += -lrte_pmd_crypto_scheduler
ifeq ($(CONFIG_RTE_EAL_VFIO)$(CONFIG_RTE_LIBRTE_FSLMC_BUS),yy)
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC) += -lrte_pmd_dpaa2_sec
--
2.7.4
