> -----Original Message-----
> From: Anoob Joseph [mailto:anoob.jos...@caviumnetworks.com]
> Sent: Friday, June 8, 2018 5:45 PM
> To: Akhil Goyal <akhil.go...@nxp.com>; De Lara Guarch, Pablo
> <pablo.de.lara.gua...@intel.com>; Thomas Monjalon <tho...@monjalon.net>
> Cc: Srisivasubramanian Srinivasan
> <srisivasubramanian.sriniva...@cavium.com>; Ankur Dwivedi
> <ankur.dwiv...@cavium.com>; Jerin Jacob
> <jerin.ja...@caviumnetworks.com>; Murthy NSSR
> <nidadavolu.mur...@cavium.com>; Narayana Prasad
> <narayanaprasad.athr...@caviumnetworks.com>; Nithin Dabilpuram
> <nithin.dabilpu...@cavium.com>; Ragothaman Jayaraman
> <ragothaman.jayara...@cavium.com>; dev@dpdk.org
> Subject: [PATCH 11/16] crypto/cpt: add the basic device callback functions
>
> From: Srisivasubramanian Srinivasan
> <srisivasubramanian.sriniva...@cavium.com>
>
> This patch addresses the following:
> 1. Adds the basic device operation functions for the cpt vf.
> 2. The probe/remove functions are staic so no need to declare in the header
> file.
> 3. Removing extra declaration for cpt_dev_periodic_alarm_stop in the header
> file.
>
> Signed-off-by: Ankur Dwivedi <ankur.dwiv...@cavium.com>
> Signed-off-by: Murthy NSSR <nidadavolu.mur...@cavium.com>
> Signed-off-by: Nithin Dabilpuram <nithin.dabilpu...@cavium.com>
> Signed-off-by: Ragothaman Jayaraman
> <ragothaman.jayara...@cavium.com>
> Signed-off-by: Srisivasubramanian Srinivasan
> <srisivasubramanian.sriniva...@cavium.com>
> ---
> drivers/crypto/cpt/Makefile | 1 +
> drivers/crypto/cpt/cpt_pmd_cryptodev.c | 13 +-
> drivers/crypto/cpt/cpt_pmd_ops.c | 544
> +++++++++++++++++++++++++++++++++
> drivers/crypto/cpt/cpt_pmd_ops.h | 64 ++++
> 4 files changed, 616 insertions(+), 6 deletions(-) create mode 100644
> drivers/crypto/cpt/cpt_pmd_ops.c create mode 100644
> drivers/crypto/cpt/cpt_pmd_ops.h
>
> diff --git a/drivers/crypto/cpt/Makefile b/drivers/crypto/cpt/Makefile index
> 40ec9e2..bf22c2b 100644
...
> +++ b/drivers/crypto/cpt/cpt_pmd_ops.c
> @@ -0,0 +1,544 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2017 Cavium, Inc
> + */
> +
> +#include <rte_cryptodev_pmd.h>
> +#include <rte_crypto.h>
> +#include <rte_bus_pci.h>
> +
> +#include "cpt_pmd_logs.h"
> +#include "cpt_pmd_ops.h"
> +#include "base/cpt.h"
> +#include "base/cpt_device.h"
> +
> +struct cpt_sess_misc {
> + uint16_t cpt_op:4;
> + uint16_t zsk_flag:4;
> + uint16_t aes_gcm:1;
> + uint16_t aes_ctr:1;
> + uint16_t dir_dma_supp:1; /* Single frag DMA supported? */
> + uint16_t is_gmac:1;
> + uint16_t aad_length;
> + uint8_t mac_len;
> + uint8_t iv_length; /**< IV length in bytes */
> + uint8_t auth_iv_length; /**< Auth IV length in bytes */
> + uint8_t rsvd1;
> + uint16_t iv_offset; /**< IV offset in bytes */
> + uint16_t auth_iv_offset; /**< Auth IV offset in bytes */
> + uint32_t salt;
> + phys_addr_t ctx_dma_addr;
> +};
> +
> +/* Helper macros */
> +
> +#define SRC_IOV_SIZE \
> + (sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * MAX_SG_CNT)) #define
> +DST_IOV_SIZE \
> + (sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * MAX_SG_CNT))
> +
> +#define SESS_PRIV(__sess) \
> + (void *)((uint8_t *)__sess + sizeof(struct cpt_sess_misc))
> +
> +#define BYTE_LEN 8
> +
> +/* #define CPT_ALWAYS_USE_SG_MODE */
> +#define CPT_ALWAYS_USE_SEPARATE_BUF
> +
> +/* TODO: Add all other capabilities */
> +static const struct rte_cryptodev_capabilities cpt_capabilities[] = {
> + { /* SHA1 HMAC */
> + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
> + {.sym = {
> + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
> + {.auth = {
> + .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
> + .block_size = 64,
> + .key_size = {
> + .min = 64,
> + .max = 64,
> + .increment = 0
> + },
> + .digest_size = {
> + .min = 1,
> + .max = 20,
> + .increment = 1
> + },
> + .aad_size = { 0 }
Aad_size is not needed for authentication only algorithm, so it can be removed
from these ones.
Unfortunately, it was left in the capabilities and to avoid breaking the API,
it won't be removed
for the moment.
...
> + { /* AES GMAC (AUTH) */
> + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
> + {.sym = {
> + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
> + {.auth = {
> + .algo = RTE_CRYPTO_AUTH_AES_GMAC,
> + .block_size = 16,
> + .key_size = {
> + .min = 16,
> + .max = 32,
> + .increment = 8
> + },
> + .digest_size = {
> + .min = 8,
> + .max = 16,
> + .increment = 4
> + },
> + .aad_size = {
> + .min = 1,
> + .max = 65535,
> + .increment = 1
> + }
GMAC does not use AAD. All the message is passing in m_src.
> + }, }
> + }, }
> + },
> + { /* SNOW 3G (UIA2) */
> + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
> + {.sym = {
> + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
> + {.auth = {
> + .algo = RTE_CRYPTO_AUTH_SNOW3G_UIA2,
> + .block_size = 16,
> + .key_size = {
> + .min = 16,
> + .max = 16,
> + .increment = 0
> + },
> + .digest_size = {
> + .min = 4,
> + .max = 4,
> + .increment = 0
> + },
> + .aad_size = {
> + .min = 16,
> + .max = 16,
> + .increment = 0
> + }
AAD is not used in SNOW3G/ZUC/KASUMI algorithms.
...
> +void
> +cptvf_dev_info_get(struct rte_cryptodev *dev, struct rte_cryptodev_info
> +*info) {
> + PMD_INIT_FUNC_TRACE();
> + if (info != NULL) {
> + info->max_nb_queue_pairs = CPT_NUM_QS_PER_VF;
> + info->feature_flags = dev->feature_flags;
> + info->capabilities = cpt_capabilities;
> + /* TODO: Hardcoding as of now */
> + info->sym.max_nb_sessions = 128;
Looks like "max_nb_sessions" will remain and if the PMD has no limitation, it
should be set to 0.
Watch out for these series http://patches.dpdk.org/user/todo/dpdk/?series=70.
> + info->driver_id = cryptodev_cpt_driver_id;
