.gitignore | 1
configure.ac | 2
man/radeon.man | 240 ---
src/Makefile.am | 7
src/local_xf86Rename.h | 23
src/radeon.h | 279 ++--
src/radeon_bios.c | 1001 +++++++++++++--
src/radeon_crtc.c | 1298 +++++++++++++++++++
src/radeon_cursor.c | 302 +---
src/radeon_display.c | 1706 +------------------------
src/radeon_dri.c | 52
src/radeon_driver.c | 3257 +++++++++++++++----------------------------------
src/radeon_mergedfb.c | 2118 -------------------------------
src/radeon_mergedfb.h | 121 -
src/radeon_modes.c | 677 +---------
src/radeon_output.c | 2616 +++++++++++++++++++++++++++++++++++++++
src/radeon_probe.h | 119 +
src/radeon_reg.h | 169 ++
src/radeon_tv.c | 762 +++++++++++
src/radeon_tv.h | 56
src/radeon_version.h | 2
src/radeon_video.c | 350 +++--
src/radeon_video.h | 6
23 files changed, 7609 insertions(+), 7555 deletions(-)
New commits:
commit 9d38c8aa1a7d6fb1af41ee8abdb4a95f94843538
Author: Dave Airlie <[EMAIL PROTECTED]>
Date: Thu Aug 23 20:10:24 2007 +1000
radeon: cleanup some warnings
diff --git a/src/radeon.h b/src/radeon.h
index 6128345..1a91cfd 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -960,6 +960,10 @@ extern void RADEONAdjustPLL2RegistersForTV(ScrnInfoPtr
pScrn, RADEONSavePtr save
extern void RADEONInitTVRegisters(xf86OutputPtr output, RADEONSavePtr save,
DisplayModePtr mode, BOOL IsPrimary);
+extern void RADEONRestoreTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore);
+extern void RADEONRestoreTVRestarts(ScrnInfoPtr pScrn, RADEONSavePtr restore);
+extern void RADEONRestoreTVTimingTables(ScrnInfoPtr pScrn, RADEONSavePtr
restore);
+
#ifdef XF86DRI
#ifdef USE_XAA
extern void RADEONAccelInitCP(ScreenPtr pScreen, XAAInfoRecPtr a);
diff --git a/src/radeon_bios.c b/src/radeon_bios.c
index 9d8946f..975fc07 100644
--- a/src/radeon_bios.c
+++ b/src/radeon_bios.c
@@ -623,6 +623,7 @@ Bool RADEONGetTVInfoFromBIOS (xf86OutputPtr output) {
return FALSE;
}
}
+ return FALSE;
}
/* Read PLL parameters from BIOS block. Default to typical values if there
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 0dc8d56..1f4d0c2 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4256,7 +4256,6 @@ void RADEONRestoreFPRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr restore)
void RADEONRestoreFP2Registers(ScrnInfoPtr pScrn, RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
OUTREG(RADEON_FP2_GEN_CNTL, restore->fp2_gen_cntl);
@@ -4267,7 +4266,6 @@ void RADEONRestoreFP2Registers(ScrnInfoPtr pScrn,
RADEONSavePtr restore)
void RADEONRestoreRMXRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
OUTREG(RADEON_FP_HORZ_STRETCH, restore->fp_horz_stretch);
@@ -4390,7 +4388,7 @@ static CARD16 RADEONGetVTimingTablesAddr(CARD32 tv_uv_adr)
}
/* Restore horizontal/vertical timing code tables */
-static void RADEONRestoreTVTimingTables(ScrnInfoPtr pScrn, RADEONSavePtr
restore)
+void RADEONRestoreTVTimingTables(ScrnInfoPtr pScrn, RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
@@ -4466,7 +4464,7 @@ static void RADEONRestoreTVHVRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr restore)
}
/* restore TV RESTART registers */
-static void RADEONRestoreTVRestarts(ScrnInfoPtr pScrn, RADEONSavePtr restore)
+void RADEONRestoreTVRestarts(ScrnInfoPtr pScrn, RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
@@ -5259,7 +5257,6 @@ static void RADEONSaveTVRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr save)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
- unsigned i;
ErrorF("Entering TV Save\n");
commit e4c8969b48a6c8dcc4e7f9852479d24a0204fc0d
Author: Dave Airlie <[EMAIL PROTECTED]>
Date: Thu Aug 23 19:56:21 2007 +1000
updated release numbering for randr 1.2
diff --git a/configure.ac b/configure.ac
index 441e723..b178224 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-ati],
- 6.6.193,
+ 6.7.191,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-ati)
commit 53a67e31904bec9a3aa1bd24de8034dcafea1d2a
Author: Alex Deucher <[EMAIL PROTECTED]>
Date: Tue Aug 21 21:20:41 2007 -0400
RADEON: Fix color problem on pre-R3xx chips tv-out
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index 1f61250..522f7ed 100644
--- a/src/radeon_tv.c
+++ b/src/radeon_tv.c
@@ -620,7 +620,6 @@ void RADEONAdjustCrtcRegistersForTV(ScrnInfoPtr pScrn,
RADEONSavePtr save,
save->crtc_v_sync_strt_wid = (save->crtc_v_sync_strt_wid &
~RADEON_CRTC_V_SYNC_STRT) |
((constPtr->verSyncStart - 1) << RADEON_CRTC_V_SYNC_STRT_SHIFT);
- save->disp_merge_cntl |= RADEON_DISP_RGB_OFFSET_EN;
}
void RADEONAdjustPLLRegistersForTV(ScrnInfoPtr pScrn, RADEONSavePtr save,
@@ -705,7 +704,6 @@ void RADEONAdjustCrtc2RegistersForTV(ScrnInfoPtr pScrn,
RADEONSavePtr save,
save->crtc_v_sync_strt_wid = (save->crtc_v_sync_strt_wid &
~RADEON_CRTC_V_SYNC_STRT) |
((constPtr->verSyncStart - 1) << RADEON_CRTC_V_SYNC_STRT_SHIFT);
- save->disp2_merge_cntl |= RADEON_DISP2_RGB_OFFSET_EN;
}
void RADEONAdjustPLL2RegistersForTV(ScrnInfoPtr pScrn, RADEONSavePtr save,
commit e9719e8e02eef46717ae9b4d8c7998466dac30cb
Author: Alex Deucher <[EMAIL PROTECTED]>
Date: Tue Aug 21 21:17:20 2007 -0400
RADEON: more tv out fixes and clean up
diff --git a/src/radeon.h b/src/radeon.h
index a778cb8..bf60ab6 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -330,6 +330,7 @@ typedef struct {
CARD32 tv_data_delay_b;
CARD32 tv_dac_cntl;
CARD32 tv_pll_cntl;
+ CARD32 tv_pll_cntl1;
CARD32 tv_pll_fine_cntl;
CARD32 tv_modulator_cntl1;
CARD32 tv_modulator_cntl2;
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index c822937..57bb0bb 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4403,15 +4403,6 @@ static void RADEONRestoreTVTimingTables(ScrnInfoPtr
pScrn, RADEONSavePtr restore
hTable = RADEONGetHTimingTablesAddr(restore->tv_uv_adr);
vTable = RADEONGetVTimingTablesAddr(restore->tv_uv_adr);
- OUTREG(RADEON_TV_MASTER_CNTL, (RADEON_TV_ASYNC_RST
- | RADEON_CRT_ASYNC_RST
- | RADEON_RESTART_PHASE_FIX
- | RADEON_CRT_FIFO_CE_EN
- | RADEON_TV_FIFO_CE_EN
- | RADEON_TV_ON));
-
- /*OUTREG(RADEON_TV_MASTER_CNTL, restore->tv_master_cntl | RADEON_TV_ON);*/
-
for (i = 0; i < MAX_H_CODE_TIMING_LEN; i += 2, hTable--) {
tmp = ((CARD32)restore->h_code_timing[ i ] << 14) |
((CARD32)restore->h_code_timing[ i + 1 ]);
RADEONWriteTVFIFO(pScrn, hTable, tmp);
@@ -4511,12 +4502,9 @@ void RADEONRestoreTVRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr restore)
ErrorF("Entering Restore TV\n");
- OUTREG(RADEON_TV_MASTER_CNTL, restore->tv_master_cntl | RADEON_TV_ON);
-
OUTREG(RADEON_TV_MASTER_CNTL, (restore->tv_master_cntl
| RADEON_TV_ASYNC_RST
| RADEON_CRT_ASYNC_RST
- | RADEON_RESTART_PHASE_FIX
| RADEON_TV_FIFO_ASYNC_RST));
/* Temporarily turn the TV DAC off */
@@ -4534,8 +4522,7 @@ void RADEONRestoreTVRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr restore)
OUTREG(RADEON_TV_MASTER_CNTL, (restore->tv_master_cntl
| RADEON_TV_ASYNC_RST
- | RADEON_CRT_ASYNC_RST
- | RADEON_RESTART_PHASE_FIX));
+ | RADEON_CRT_ASYNC_RST));
ErrorF("Restore TV Restarts\n");
RADEONRestoreTVRestarts(pScrn, restore);
@@ -4545,8 +4532,7 @@ void RADEONRestoreTVRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr restore)
OUTREG(RADEON_TV_MASTER_CNTL, (restore->tv_master_cntl
- | RADEON_TV_ASYNC_RST
- | RADEON_RESTART_PHASE_FIX));
+ | RADEON_TV_ASYNC_RST));
ErrorF("Restore TV standard\n");
RADEONRestoreTVOutputStd(pScrn, restore);
@@ -5305,6 +5291,7 @@ static void RADEONSaveTVRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr save)
save->tv_y_saw_tooth_cntl = INREG(RADEON_TV_Y_SAW_TOOTH_CNTL);
save->tv_pll_cntl = INPLL(pScrn, RADEON_TV_PLL_CNTL);
+ save->tv_pll_cntl1 = INPLL(pScrn, RADEON_TV_PLL_CNTL1);
ErrorF("Save TV timing tables\n");
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 4e4d874..9eae40d 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -3141,6 +3141,8 @@
# define RADEON_RGB_SRC_SEL_RMX (1 << 8)
# define RADEON_RGB_SRC_SEL_CRTC2 (2 << 8)
# define RADEON_RGB_CONVERT_BY_PASS (1 << 10)
+# define RADEON_UVRAM_READ_MARGIN_SHIFT 16
+# define RADEON_FIFORAM_FFMACRO_READ_MARGIN_SHIFT 20
# define RADEON_TVOUT_SCALE_EN (1 << 26)
#define RADEON_TV_SYNC_CNTL 0x0808
# define RADEON_SYNC_OE (1 << 0)
@@ -3211,6 +3213,9 @@
# define RADEON_SLEW_RATE_LIMIT (1 << 23)
# define RADEON_CY_FILT_BLEND_SHIFT 28
#define RADEON_TV_MODULATOR_CNTL2 0x0874
+# define RADEON_TV_U_BURST_LEVEL_MASK 0x1ff
+# define RADEON_TV_V_BURST_LEVEL_MASK 0x1ff
+# define RADEON_TV_V_BURST_LEVEL_SHIFT 16
#define RADEON_TV_CRC_CNTL 0x0890
#define RADEON_TV_UV_ADR 0x08ac
# define RADEON_MAX_UV_ADR_MASK 0x000000ff
@@ -3242,6 +3247,10 @@
# define RADEON_TVPLL_RESET (1 << 1)
# define RADEON_TVPLL_SLEEP (1 << 3)
# define RADEON_TVPLL_REFCLK_SEL (1 << 4)
+# define RADEON_TVPCP_SHIFT 8
+# define RADEON_TVPCP_MASK (7 << 8)
+# define RADEON_TVPVG_SHIFT 11
+# define RADEON_TVPVG_MASK (7 << 11)
# define RADEON_TVPDC_SHIFT 14
# define RADEON_TVPDC_MASK (3 << 14)
# define RADEON_TVPLL_TEST_DIS (1 << 31)
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index 73bf34d..1f61250 100644
--- a/src/radeon_tv.c
+++ b/src/radeon_tv.c
@@ -205,8 +205,7 @@ static Bool RADEONInitTVRestarts(xf86OutputPtr output,
RADEONSavePtr save,
/* FIXME: need to revisit this when we add more modes */
if (radeon_output->tvStd == TV_STD_NTSC ||
radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M ||
- radeon_output->tvStd == TV_STD_PAL_60)
+ radeon_output->tvStd == TV_STD_PAL_M)
constPtr = &availableTVModes[0];
else
constPtr = &availableTVModes[1];
@@ -257,7 +256,7 @@ static Bool RADEONInitTVRestarts(xf86OutputPtr output,
RADEONSavePtr save,
*/
if (radeon_output->tvStd == TV_STD_NTSC ||
radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M||
+ radeon_output->tvStd == TV_STD_PAL_M ||
radeon_output->tvStd == TV_STD_PAL_60)
vOffset = ((int)(vTotal * hTotal) * 2 * radeon_output->vPos) /
(int)(NTSC_TV_LINES_PER_FRAME);
else
@@ -280,8 +279,7 @@ static Bool RADEONInitTVRestarts(xf86OutputPtr output,
RADEONSavePtr save,
/* Compute H_INC from hSize */
if (radeon_output->tvStd == TV_STD_NTSC ||
radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M ||
- radeon_output->tvStd == TV_STD_PAL_60)
+ radeon_output->tvStd == TV_STD_PAL_M)
hInc = (CARD16)((int)(constPtr->horResolution * 4096 * NTSC_TV_CLOCK_T)
/
(radeon_output->hSize * (int)(NTSC_TV_H_SIZE_UNIT) +
(int)(NTSC_TV_ZERO_H_SIZE)));
else
@@ -314,8 +312,7 @@ void RADEONInitTVRegisters(xf86OutputPtr output,
RADEONSavePtr save,
/* FIXME: need to revisit this when we add more modes */
if (radeon_output->tvStd == TV_STD_NTSC ||
radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M ||
- radeon_output->tvStd == TV_STD_PAL_60)
+ radeon_output->tvStd == TV_STD_PAL_M)
constPtr = &availableTVModes[0];
else
constPtr = &availableTVModes[1];
@@ -332,10 +329,7 @@ void RADEONInitTVRegisters(xf86OutputPtr output,
RADEONSavePtr save,
save->tv_linear_gain_settings = (0x100 << RADEON_UV_GAIN_SHIFT) |
(0x100 << RADEON_Y_GAIN_SHIFT);
- save->tv_master_cntl = (RADEON_RESTART_PHASE_FIX
- | RADEON_VIN_ASYNC_RST
- | RADEON_AUD_ASYNC_RST
- | RADEON_DVS_ASYNC_RST
+ save->tv_master_cntl = (RADEON_VIN_ASYNC_RST
| RADEON_CRT_FIFO_CE_EN
| RADEON_TV_FIFO_CE_EN
| RADEON_TV_ON);
@@ -343,24 +337,32 @@ void RADEONInitTVRegisters(xf86OutputPtr output,
RADEONSavePtr save,
if (!IS_R300_VARIANT)
save->tv_master_cntl |= RADEON_TVCLK_ALWAYS_ONb;
+ if (radeon_output->tvStd == TV_STD_NTSC ||
+ radeon_output->tvStd == TV_STD_NTSC_J)
+ save->tv_master_cntl |= RADEON_RESTART_PHASE_FIX;
+
save->tv_modulator_cntl1 = RADEON_SLEW_RATE_LIMIT
| RADEON_SYNC_TIP_LEVEL
| RADEON_YFLT_EN
| RADEON_UVFLT_EN
- | (0x3b << RADEON_BLANK_LEVEL_SHIFT)
- | (0x6 << RADEON_CY_FILT_BLEND_SHIFT);
+ | (2 << RADEON_CY_FILT_BLEND_SHIFT);
if (radeon_output->tvStd == TV_STD_NTSC ||
- radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M ||
- radeon_output->tvStd == TV_STD_PAL_60 ||
- radeon_output->tvStd == TV_STD_SCART_PAL) {
- save->tv_modulator_cntl1 |= (0x46 << RADEON_SET_UP_LEVEL_SHIFT);
- save->tv_modulator_cntl2 = 0x00000191;
+ radeon_output->tvStd == TV_STD_NTSC_J) {
+ save->tv_modulator_cntl1 |= (0x46 << RADEON_SET_UP_LEVEL_SHIFT)
+ | (0x3b << RADEON_BLANK_LEVEL_SHIFT);
+ save->tv_modulator_cntl2 = (-111 & RADEON_TV_U_BURST_LEVEL_MASK) |
+ ((0 & RADEON_TV_V_BURST_LEVEL_MASK) <<
RADEON_TV_V_BURST_LEVEL_SHIFT);
+ } else if (radeon_output->tvStd == TV_STD_SCART_PAL) {
+ save->tv_modulator_cntl1 |= RADEON_ALT_PHASE_EN;
+ save->tv_modulator_cntl2 = (0 & RADEON_TV_U_BURST_LEVEL_MASK) |
+ ((0 & RADEON_TV_V_BURST_LEVEL_MASK) <<
RADEON_TV_V_BURST_LEVEL_SHIFT);
} else {
save->tv_modulator_cntl1 |= RADEON_ALT_PHASE_EN
- | (0x3b << RADEON_SET_UP_LEVEL_SHIFT);
- save->tv_modulator_cntl2 = 0x003e01b2;
+ | (0x3b << RADEON_SET_UP_LEVEL_SHIFT)
+ | (0x3b << RADEON_BLANK_LEVEL_SHIFT);
+ save->tv_modulator_cntl2 = (-78 & RADEON_TV_U_BURST_LEVEL_MASK) |
+ ((62 & RADEON_TV_V_BURST_LEVEL_MASK) <<
RADEON_TV_V_BURST_LEVEL_SHIFT);
}
save->pll_test_cntl = 0;
@@ -370,8 +372,10 @@ void RADEONInitTVRegisters(xf86OutputPtr output,
RADEONSavePtr save,
| RADEON_CMP_BLU_EN
| RADEON_DAC_DITHER_EN);
- save->tv_rgb_cntl = (RADEON_RGB_DITHER_EN | RADEON_TVOUT_SCALE_EN
- | (0x0b << 16) | (0x07 << 20));
+ save->tv_rgb_cntl = (RADEON_RGB_DITHER_EN
+ | RADEON_TVOUT_SCALE_EN
+ | (0x0b << RADEON_UVRAM_READ_MARGIN_SHIFT)
+ | (0x07 << RADEON_FIFORAM_FFMACRO_READ_MARGIN_SHIFT));
if (IsPrimary) {
if (radeon_output->Flags & RADEON_USE_RMX)
@@ -445,9 +449,7 @@ void RADEONInitTVRegisters(xf86OutputPtr output,
RADEONSavePtr save,
save->tv_dac_cntl = RADEON_TV_DAC_NBLANK | RADEON_TV_DAC_NHOLD | (8 << 16)
| (6 << 20);
if (radeon_output->tvStd == TV_STD_NTSC ||
- radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M ||
- radeon_output->tvStd == TV_STD_PAL_60)
+ radeon_output->tvStd == TV_STD_NTSC_J)
save->tv_dac_cntl |= RADEON_TV_DAC_STD_NTSC;
else
save->tv_dac_cntl |= RADEON_TV_DAC_STD_PAL;
@@ -468,9 +470,7 @@ void RADEONInitTVRegisters(xf86OutputPtr output,
RADEONSavePtr save,
#endif
if (radeon_output->tvStd == TV_STD_NTSC ||
- radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M ||
- radeon_output->tvStd == TV_STD_PAL_60)
+ radeon_output->tvStd == TV_STD_NTSC_J)
save->tv_pll_cntl = (NTSC_TV_PLL_M & RADEON_TV_M0LO_MASK) |
(((NTSC_TV_PLL_M >> 8) & RADEON_TV_M0HI_MASK) <<
RADEON_TV_M0HI_SHIFT) |
((NTSC_TV_PLL_N & RADEON_TV_N0LO_MASK) << RADEON_TV_N0LO_SHIFT) |
@@ -483,6 +483,12 @@ void RADEONInitTVRegisters(xf86OutputPtr output,
RADEONSavePtr save,
(((PAL_TV_PLL_N >> 8) & RADEON_TV_N0HI_MASK) <<
RADEON_TV_N0HI_SHIFT) |
((PAL_TV_PLL_P & RADEON_TV_P_MASK) << RADEON_TV_P_SHIFT);
+ save->tv_pll_cntl1 = (((4 & RADEON_TVPCP_MASK)<< RADEON_TVPCP_SHIFT) |
+ ((4 & RADEON_TVPVG_MASK) << RADEON_TVPVG_SHIFT) |
+ ((1 & RADEON_TVPDC_MASK)<< RADEON_TVPDC_SHIFT) |
+ RADEON_TVCLK_SRC_SEL_TVPLL |
+ RADEON_TVPLL_TEST_DIS);
+
save->tv_upsamp_and_gain_cntl = RADEON_YUPSAMP_EN | RADEON_UVUPSAMP_EN;
save->tv_uv_adr = 0xc8;
@@ -595,8 +601,7 @@ void RADEONAdjustCrtcRegistersForTV(ScrnInfoPtr pScrn,
RADEONSavePtr save,
/* FIXME: need to revisit this when we add more modes */
if (radeon_output->tvStd == TV_STD_NTSC ||
radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M ||
- radeon_output->tvStd == TV_STD_PAL_60)
+ radeon_output->tvStd == TV_STD_PAL_M)
constPtr = &availableTVModes[0];
else
constPtr = &availableTVModes[1];
@@ -628,8 +633,7 @@ void RADEONAdjustPLLRegistersForTV(ScrnInfoPtr pScrn,
RADEONSavePtr save,
/* FIXME: need to revisit this when we add more modes */
if (radeon_output->tvStd == TV_STD_NTSC ||
radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M ||
- radeon_output->tvStd == TV_STD_PAL_60)
+ radeon_output->tvStd == TV_STD_PAL_M)
constPtr = &availableTVModes[0];
else
constPtr = &availableTVModes[1];
@@ -682,8 +686,7 @@ void RADEONAdjustCrtc2RegistersForTV(ScrnInfoPtr pScrn,
RADEONSavePtr save,
/* FIXME: need to revisit this when we add more modes */
if (radeon_output->tvStd == TV_STD_NTSC ||
radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M ||
- radeon_output->tvStd == TV_STD_PAL_60)
+ radeon_output->tvStd == TV_STD_PAL_M)
constPtr = &availableTVModes[0];
else
constPtr = &availableTVModes[1];
@@ -715,8 +718,7 @@ void RADEONAdjustPLL2RegistersForTV(ScrnInfoPtr pScrn,
RADEONSavePtr save,
/* FIXME: need to revisit this when we add more modes */
if (radeon_output->tvStd == TV_STD_NTSC ||
radeon_output->tvStd == TV_STD_NTSC_J ||
- radeon_output->tvStd == TV_STD_PAL_M ||
- radeon_output->tvStd == TV_STD_PAL_60)
+ radeon_output->tvStd == TV_STD_PAL_M)
constPtr = &availableTVModes[0];
else
constPtr = &availableTVModes[1];
commit 36c22a49580d86a6518b67f31a78bd53d39491af
Author: Alex Deucher <[EMAIL PROTECTED]>
Date: Tue Aug 21 20:28:39 2007 -0400
RADEON: fix tv-out on R3xx
R3xx apparently needs the tv clock forced on.
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index 8dbe974..73bf34d 100644
--- a/src/radeon_tv.c
+++ b/src/radeon_tv.c
@@ -338,9 +338,11 @@ void RADEONInitTVRegisters(xf86OutputPtr output,
RADEONSavePtr save,
| RADEON_DVS_ASYNC_RST
| RADEON_CRT_FIFO_CE_EN
| RADEON_TV_FIFO_CE_EN
- | RADEON_TVCLK_ALWAYS_ONb
| RADEON_TV_ON);
+ if (!IS_R300_VARIANT)
+ save->tv_master_cntl |= RADEON_TVCLK_ALWAYS_ONb;
+
save->tv_modulator_cntl1 = RADEON_SLEW_RATE_LIMIT
| RADEON_SYNC_TIP_LEVEL
| RADEON_YFLT_EN
commit 9470bd67731059f26859ed5f0bea3ade09e2c80c
Author: Alex Deucher <[EMAIL PROTECTED]>
Date: Mon Aug 20 20:54:06 2007 -0400
RADEON: Add DefaultConnectorTable option
This option skips the parsing the BIOS connector table
and falls back to chip specific defaults.
Also remove man page section for the now gone bioshotkeys
option.
diff --git a/man/radeon.man b/man/radeon.man
index fcb6d73..63bbb9b 100644
--- a/man/radeon.man
+++ b/man/radeon.man
@@ -363,13 +363,6 @@ life by reducing power usage. Some users report reduced
3D performance
with this enabled. The default is
.B off.
.TP
-.BI "Option \*qBIOSHotkeys\*q \*q" boolean \*q
-Enable BIOS hotkey output switching. This allows the BIOS to toggle outputs
-using hotkeys (e.g., fn-f7, etc.). Since the driver does not support ACPI,
-there is no way to validate modes on an output switch and the BIOS can
-potentially change things behind the driver's back. The default is
-.B off.
-.TP
.BI "Option \*qVGAAccess\*q \*q" boolean \*q
Tell the driver if it can do legacy VGA IOs to the card. This is
necessary for properly resuming consoles when in VGA text mode, but
@@ -406,6 +399,12 @@ for RN50/ES1000 and
.B on
for others.
.TP
+.BI "Option \*qDefaultConnectorTable\*q \*q" boolean \*q
+Enable this option to skip the BIOS connector table parsing and use the
+driver defaults for each chip.
+The default is
+.B off
+.TP
.SH SEE ALSO
__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__),
xorgconfig(__appmansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__)
diff --git a/src/radeon.h b/src/radeon.h
index 4f7f60e..a778cb8 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -151,7 +151,8 @@ typedef enum {
OPTION_ACCELMETHOD,
OPTION_CONSTANTDPI,
OPTION_CONNECTORTABLE,
- OPTION_DRI
+ OPTION_DRI,
+ OPTION_DEFAULT_CONNECTOR_TABLE
} RADEONOpts;
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index ae34cf3..c822937 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -188,6 +188,7 @@ static const OptionInfoRec RADEONOptions[] = {
{ OPTION_CONSTANTDPI, "ConstantDPI", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_DRI, "DRI", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_CONNECTORTABLE, "ConnectorTable", OPTV_STRING, {0}, FALSE },
+ { OPTION_DEFAULT_CONNECTOR_TABLE, "DefaultConnectorTable", OPTV_BOOLEAN,
{0}, FALSE },
{ -1, NULL, OPTV_NONE, {0}, FALSE }
};
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 73e44f3..9650a39 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -2344,34 +2344,29 @@ void RADEONInitConnector(xf86OutputPtr output)
}
-/*
- * initialise the static data sos we don't have to re-do at randr change */
-Bool RADEONSetupConnectors(ScrnInfoPtr pScrn)
+static void RADEONSetupGenericConnectors(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
- xf86OutputPtr output;
- char *optstr;
- int i = 0;
- int num_vga = 0;
- int num_dvi = 0;
- /* We first get the information about all connectors from BIOS.
- * This is how the card is phyiscally wired up.
- * The information should be correct even on a OEM card.
- * If not, we may have problem -- need to use MonitorLayout option.
- */
- for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
- info->BiosConnector[i].valid = FALSE;
- info->BiosConnector[i].DDCType = DDC_NONE_DETECTED;
- info->BiosConnector[i].DACType = DAC_UNKNOWN;
- info->BiosConnector[i].TMDSType = TMDS_UNKNOWN;
- info->BiosConnector[i].ConnectorType = CONNECTOR_NONE;
- }
+ if (info->IsMobility) {
+ /* Below is the most common setting, but may not be true */
+ if (info->IsIGP) {
+ info->BiosConnector[0].DDCType = DDC_LCD;
+ info->BiosConnector[0].DACType = DAC_UNKNOWN;
+ info->BiosConnector[0].TMDSType = TMDS_UNKNOWN;
+ info->BiosConnector[0].ConnectorType = CONNECTOR_PROPRIETARY;
+ info->BiosConnector[0].valid = TRUE;
- if (!RADEONGetConnectorInfoFromBIOS(pScrn)) {
- if (info->IsMobility) {
- /* Below is the most common setting, but may not be true */
+ /* IGP only has TVDAC */
+ if (info->ChipFamily == CHIP_FAMILY_RS400)
+ info->BiosConnector[1].DDCType = DDC_CRT2;
+ else
+ info->BiosConnector[1].DDCType = DDC_VGA;
+ info->BiosConnector[1].DACType = DAC_TVDAC;
+ info->BiosConnector[1].TMDSType = TMDS_UNKNOWN;
+ info->BiosConnector[1].ConnectorType = CONNECTOR_CRT;
+ info->BiosConnector[1].valid = TRUE;
+ } else {
#if defined(__powerpc__)
info->BiosConnector[0].DDCType = DDC_DVI;
#else
@@ -2387,9 +2382,28 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn)
info->BiosConnector[1].TMDSType = TMDS_EXT;
info->BiosConnector[1].ConnectorType = CONNECTOR_CRT;
info->BiosConnector[1].valid = TRUE;
+ }
+ } else {
+ /* Below is the most common setting, but may not be true */
+ if (info->IsIGP) {
+ if (info->ChipFamily == CHIP_FAMILY_RS400)
+ info->BiosConnector[0].DDCType = DDC_CRT2;
+ else
+ info->BiosConnector[0].DDCType = DDC_VGA;
+ info->BiosConnector[0].DACType = DAC_TVDAC;
+ info->BiosConnector[0].TMDSType = TMDS_UNKNOWN;
+ info->BiosConnector[0].ConnectorType = CONNECTOR_CRT;
+ info->BiosConnector[0].valid = TRUE;
+ /* not sure what a good default DDCType for DVI on
+ * IGP desktop chips is
+ */
+ info->BiosConnector[1].DDCType = DDC_MONID; /* DDC_DVI? */
+ info->BiosConnector[1].DACType = DAC_UNKNOWN;
+ info->BiosConnector[1].TMDSType = TMDS_EXT;
+ info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_D;
+ info->BiosConnector[1].valid = TRUE;
} else {
- /* Below is the most common setting, but may not be true */
info->BiosConnector[0].DDCType = DDC_DVI;
info->BiosConnector[0].DACType = DAC_TVDAC;
info->BiosConnector[0].TMDSType = TMDS_INT;
@@ -2402,35 +2416,68 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn)
info->BiosConnector[1].ConnectorType = CONNECTOR_CRT;
info->BiosConnector[1].valid = TRUE;
}
+ }
- if (info->InternalTVOut) {
- info->BiosConnector[2].ConnectorType = CONNECTOR_STV;
- info->BiosConnector[2].DACType = DAC_TVDAC;
- info->BiosConnector[2].TMDSType = TMDS_NONE;
- info->BiosConnector[2].DDCType = DDC_NONE_DETECTED;
- info->BiosConnector[2].valid = TRUE;
- }
+ if (info->InternalTVOut) {
+ info->BiosConnector[2].ConnectorType = CONNECTOR_STV;
+ info->BiosConnector[2].DACType = DAC_TVDAC;
+ info->BiosConnector[2].TMDSType = TMDS_NONE;
+ info->BiosConnector[2].DDCType = DDC_NONE_DETECTED;
+ info->BiosConnector[2].valid = TRUE;
+ }
- /* Some cards have the DDC lines swapped and we have no way to
- * detect it yet (Mac cards)
- */
- if (xf86ReturnOptValBool(info->Options, OPTION_REVERSE_DDC, FALSE)) {
- info->BiosConnector[0].DDCType = DDC_VGA;
- info->BiosConnector[1].DDCType = DDC_DVI;
- }
+ /* Some cards have the DDC lines swapped and we have no way to
+ * detect it yet (Mac cards)
+ */
+ if (xf86ReturnOptValBool(info->Options, OPTION_REVERSE_DDC, FALSE)) {
+ info->BiosConnector[0].DDCType = DDC_VGA;
+ info->BiosConnector[1].DDCType = DDC_DVI;
+ }
+
+}
+
+/*
+ * initialise the static data sos we don't have to re-do at randr change */
+Bool RADEONSetupConnectors(ScrnInfoPtr pScrn)
+{
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
+ xf86OutputPtr output;
+ char *optstr;
+ int i = 0;
+ int num_vga = 0;
+ int num_dvi = 0;
+
+ /* We first get the information about all connectors from BIOS.
+ * This is how the card is phyiscally wired up.
+ * The information should be correct even on a OEM card.
+ */
+ for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
+ info->BiosConnector[i].valid = FALSE;
+ info->BiosConnector[i].DDCType = DDC_NONE_DETECTED;
+ info->BiosConnector[i].DACType = DAC_UNKNOWN;
+ info->BiosConnector[i].TMDSType = TMDS_UNKNOWN;
+ info->BiosConnector[i].ConnectorType = CONNECTOR_NONE;
+ }
+
+ if (xf86ReturnOptValBool(info->Options, OPTION_DEFAULT_CONNECTOR_TABLE,
FALSE)) {
+ RADEONSetupGenericConnectors(pScrn);
+ } else {
+ if (!RADEONGetConnectorInfoFromBIOS(pScrn))
+ RADEONSetupGenericConnectors(pScrn);
}
if (info->HasSingleDAC) {
/* For RS300/RS350/RS400 chips, there is no primary DAC. Force VGA
port to use TVDAC*/
- if (info->BiosConnector[0].ConnectorType == CONNECTOR_CRT) {
- info->BiosConnector[0].DACType = DAC_TVDAC;
- info->BiosConnector[1].DACType = DAC_NONE;
- } else {
- info->BiosConnector[1].DACType = DAC_TVDAC;
- info->BiosConnector[0].DACType = DAC_NONE;
- }
+ for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
+ if (info->BiosConnector[i].ConnectorType == CONNECTOR_CRT)
+ info->BiosConnector[i].DACType = DAC_TVDAC;
+ }
} else if (!pRADEONEnt->HasCRTC2) {
- info->BiosConnector[0].DACType = DAC_PRIMARY;
+ for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
+ if (info->BiosConnector[i].ConnectorType == CONNECTOR_CRT)
+ info->BiosConnector[i].DACType = DAC_PRIMARY;
+ }
}
/* parse connector table option */
commit a0d0fcd3bab765b4db25e04884fd8a342abb9c66
Author: iLisa Wu <[EMAIL PROTECTED]>
Date: Mon Aug 20 15:44:07 2007 +0200
Fix crash with no valid mode in xorg.conf's modelist and empty Virtual
If the resolution defined in xorg.conf failed to find a matching mode in the
supported modelist, and no virtual desktop dimensions are defined the
xorg.conf
either, virtual X and Y dimension will be set to 0 which will cause Xserver
crash.
(Novell bugzilla #296856, closed)
diff --git a/src/radeon_modes.c b/src/radeon_modes.c
index 1a63971..e1635e0 100644
--- a/src/radeon_modes.c
+++ b/src/radeon_modes.c
@@ -299,6 +299,8 @@ int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char
**ppModeName,
DisplayModePtr first = NULL;
DisplayModePtr ddcModes = NULL;
int count = 0;
+ int maxXRes = 0;
+ int maxYRes = 0;
int i, width, height;
ScrnInfoPtr pScrn = pScrn1;
@@ -334,13 +336,13 @@ int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char
**ppModeName,
p->Flags |= RADEON_USE_RMX;
}
- maxVirtX = MAX(maxVirtX, p->HDisplay);
- maxVirtY = MAX(maxVirtY, p->VDisplay);
+ maxXRes = maxVirtX = MAX(maxVirtX, p->HDisplay);
+ maxYRes = maxVirtY = MAX(maxVirtY, p->VDisplay);
count++;
last = p;
}
-
+
/* Match up modes that are specified in the XF86Config file */
if (ppModeName[0]) {
DisplayModePtr next;
@@ -378,9 +380,21 @@ int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char
**ppModeName,
break;
}
}
+ if (!p) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ " %dx%d is not supported by the device\n",
+ width, height);
+ }
}
}
-
+ /* just for sanity check, if maxVirtX and maxVirtY are not
+ * specified, set max resolution that panel support for the max
+ * virtual dimensions */
+ if ((!maxVirtX) || (!maxVirtY)) {
+ maxVirtX = maxXRes;
+ maxVirtY = maxYRes;
+ }
+
/*
* Add remaining DDC modes if they're smaller than the user
* specified modes
commit b275febdb0918e8cebdffbb433b0eeb3ff4d3746
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sun Aug 19 20:55:32 2007 -0400
RADEON: turn off TVCLK when blanking tv encoder
diff --git a/src/radeon_display.c b/src/radeon_display.c
index 4334016..ec0cdd9 100644
--- a/src/radeon_display.c
+++ b/src/radeon_display.c
@@ -368,6 +368,9 @@ void RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
save->lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS);
} else if (radeon_output->MonType == MT_STV ||
radeon_output->MonType == MT_CTV) {
+ tmp = INREG(RADEON_TV_MASTER_CNTL);
+ tmp |= RADEON_TV_ON;
+ OUTREG(RADEON_TV_MASTER_CNTL, tmp);
RADEONDacPowerSet(pScrn, bEnable, (radeon_output->DACType ==
DAC_PRIMARY));
}
} else {
@@ -422,6 +425,9 @@ void RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, tmpPixclksCntl);
}
} else if (radeon_output->MonType == MT_STV || radeon_output->MonType
== MT_CTV) {
+ tmp = INREG(RADEON_TV_MASTER_CNTL);
+ tmp &= ~RADEON_TV_ON;
+ OUTREG(RADEON_TV_MASTER_CNTL, tmp);
RADEONDacPowerSet(pScrn, bEnable, (radeon_output->DACType ==
DAC_PRIMARY));
}
}
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index db5288a..8dbe974 100644
--- a/src/radeon_tv.c
+++ b/src/radeon_tv.c
@@ -338,6 +338,7 @@ void RADEONInitTVRegisters(xf86OutputPtr output,
RADEONSavePtr save,
| RADEON_DVS_ASYNC_RST
| RADEON_CRT_FIFO_CE_EN
| RADEON_TV_FIFO_CE_EN
+ | RADEON_TVCLK_ALWAYS_ONb
| RADEON_TV_ON);
save->tv_modulator_cntl1 = RADEON_SLEW_RATE_LIMIT
commit a90d675832ddb02c81ace010ccbf02619b70edac
Author: Alex Deucher <[EMAIL PROTECTED]>
Date: Thu Aug 16 21:55:14 2007 -0400
RADEON: fix Xv clipping and overlay sourcing
- Basically just copied from the intel driver. I'm planning to push
this to the server soon, but add it now to get things working
and to provide compat for older servers.
- Overlay crtc source control attribute now called XV_CRTC
The old attribute XV_SWITCHCRT has been removed. If anyone cares,
we can add it back as an alias to XV_CRTC
XV_CRTC: -1 auto, 0 crtc0, 1 crtc1
diff --git a/src/radeon.h b/src/radeon.h
index a8f72fc..4f7f60e 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -460,7 +460,6 @@ typedef struct {
Bool IsMobility; /* Mobile chips for laptops */
Bool IsIGP; /* IGP chips */
Bool HasSingleDAC; /* only TVDAC on chip */
- Bool OverlayOnCRTC2;
Bool ddc_mode; /* Validate mode by matching exactly
* the modes supported in DDC data
*/
@@ -948,8 +947,6 @@ void
radeon_crtc_load_cursor_argb (xf86CrtcPtr crtc, CARD32 *image);
void
RADEONEnableOutputs(ScrnInfoPtr pScrn, int crtc_num);
-void
-RADEONChooseOverlayCRTC(ScrnInfoPtr pScrn, BoxPtr dstBox);
extern void RADEONAdjustCrtcRegistersForTV(ScrnInfoPtr pScrn, RADEONSavePtr
save,
DisplayModePtr mode, xf86OutputPtr
output);
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 8e71330..434034c 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -1296,28 +1296,3 @@ RADEONCrtcFindClosestMode(xf86CrtcPtr crtc,
DisplayModePtr pMode)
return pMode;
}
-void
-RADEONChooseOverlayCRTC(ScrnInfoPtr pScrn, BoxPtr dstBox)
-{
- xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
- RADEONInfoPtr info = RADEONPTR(pScrn);
- int c;
- int crtc_num = 0;
-
- for (c = 0; c < xf86_config->num_crtc; c++)
- {
- xf86CrtcPtr crtc = xf86_config->crtc[c];
-
- if (!crtc->enabled)
- continue;
-
- if ((dstBox->x1 >= crtc->x) && (dstBox->y1 >= crtc->y))
- crtc_num = c;
- }
-
- if (crtc_num == 1)
- info->OverlayOnCRTC2 = TRUE;
- else
- info->OverlayOnCRTC2 = FALSE;
-}
-
diff --git a/src/radeon_video.c b/src/radeon_video.c
index dbf66da..a38931c 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -106,7 +106,7 @@ static Atom xvBrightness, xvColorKey, xvSaturation,
xvDoubleBuffer;
static Atom xvRedIntensity, xvGreenIntensity, xvBlueIntensity;
static Atom xvContrast, xvHue, xvColor, xvAutopaintColorkey, xvSetDefaults;
static Atom xvGamma, xvColorspace;
-static Atom xvSwitchCRT;
+static Atom xvCRTC;
static Atom xvEncoding, xvFrequency, xvVolume, xvMute,
xvDecBrightness, xvDecContrast, xvDecHue, xvDecColor,
xvDecSaturation,
xvTunerStatus, xvSAP, xvOverlayDeinterlacingMethod,
@@ -119,6 +119,114 @@ static Atom xvOvAlpha, xvGrAlpha, xvAlphaMode;
#define GET_PORT_PRIVATE(pScrn) \
(RADEONPortPrivPtr)((RADEONPTR(pScrn))->adaptor->pPortPrivates[0].ptr)
+static void
+radeon_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b)
+{
+ dest->x1 = a->x1 > b->x1 ? a->x1 : b->x1;
+ dest->x2 = a->x2 < b->x2 ? a->x2 : b->x2;
+ dest->y1 = a->y1 > b->y1 ? a->y1 : b->y1;
+ dest->y2 = a->y2 < b->y2 ? a->y2 : b->y2;
+
+ if (dest->x1 >= dest->x2 || dest->y1 >= dest->y2)
+ dest->x1 = dest->x2 = dest->y1 = dest->y2 = 0;
+}
+
+static void
+radeon_crtc_box(xf86CrtcPtr crtc, BoxPtr crtc_box)
+{
+ if (crtc->enabled) {
+ crtc_box->x1 = crtc->x;
+ crtc_box->x2 = crtc->x + xf86ModeWidth(&crtc->mode, crtc->rotation);
+ crtc_box->y1 = crtc->y;
+ crtc_box->y2 = crtc->y + xf86ModeHeight(&crtc->mode, crtc->rotation);
+ } else
+ crtc_box->x1 = crtc_box->x2 = crtc_box->y1 = crtc_box->y2 = 0;
+}
+
+static int
+radeon_box_area(BoxPtr box)
+{
+ return (int) (box->x2 - box->x1) * (int) (box->y2 - box->y1);
+}
+
+static xf86CrtcPtr
+radeon_covering_crtc(ScrnInfoPtr pScrn,
+ BoxPtr box,
+ xf86CrtcPtr desired,
+ BoxPtr crtc_box_ret)
+{
+ xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+ xf86CrtcPtr crtc, best_crtc;
+ int coverage, best_coverage;
+ int c;
+ BoxRec crtc_box, cover_box;
+
+ best_crtc = NULL;
+ best_coverage = 0;
+ crtc_box_ret->x1 = 0;
+ crtc_box_ret->x2 = 0;
+ crtc_box_ret->y1 = 0;
+ crtc_box_ret->y2 = 0;
+ for (c = 0; c < xf86_config->num_crtc; c++) {
+ crtc = xf86_config->crtc[c];
+ radeon_crtc_box(crtc, &crtc_box);
+ radeon_box_intersect(&cover_box, &crtc_box, box);
+ coverage = radeon_box_area(&cover_box);
+ if (coverage && crtc == desired) {
+ *crtc_box_ret = crtc_box;
+ return crtc;
+ } else if (coverage > best_coverage) {
+ *crtc_box_ret = crtc_box;
+ best_crtc = crtc;
+ best_coverage = coverage;
+ }
+ }
+ return best_crtc;
+}
+
+static Bool
+radeon_clip_video_helper(ScrnInfoPtr pScrn,
+ xf86CrtcPtr *crtc_ret,
+ xf86CrtcPtr desired_crtc,
+ BoxPtr dst,
+ INT32 *xa,
+ INT32 *xb,
+ INT32 *ya,
+ INT32 *yb,
+ RegionPtr reg,
+ INT32 width,
+ INT32 height)
--
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