configure.ac | 4
man/radeon.man | 8
src/atidri.c | 7
src/radeon.h | 25 ++
src/radeon_bios.c | 32 +--
src/radeon_crtc.c | 123 +++++++------
src/radeon_display.c | 25 ++
src/radeon_dri.c | 85 +++++++--
src/radeon_driver.c | 456 ++++++++++++++++-----------------------------------
src/radeon_output.c | 39 +---
src/radeon_probe.c | 1
src/radeon_reg.h | 1
src/radeon_tv.c | 9 -
src/radeon_video.c | 55 +++---
src/theatre.c | 15 +
src/theatre200.c | 19 +-
src/theatre_detect.c | 15 +
17 files changed, 435 insertions(+), 484 deletions(-)
New commits:
commit a12e4aa01bf1c5723c3c791ff9bdc26eef21d5ea
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sun Aug 26 18:51:29 2007 -0400
Bump for new release
diff --git a/configure.ac b/configure.ac
index cdc6377..0c413c8 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-ati],
- 6.7.191,
+ 6.7.192,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-ati)
commit d43596e5f5d7c60f96b57bc3e743a9b40eb7109d
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sun Aug 26 18:07:50 2007 -0400
RADEON: Fix rotation. works now
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 026cd8a..e976e2c 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -188,7 +188,7 @@ RADEONInitCrtcBase(xf86CrtcPtr crtc, RADEONSavePtr save,
#endif
save->crtc_offset_cntl = 0;
- if (info->tilingEnabled) {
+ if (info->tilingEnabled && (crtc->rotatedData == NULL)) {
if (IS_R300_VARIANT)
save->crtc_offset_cntl |= (R300_CRTC_X_Y_MODE_EN |
R300_CRTC_MICRO_TILE_BUFFER_DIS |
@@ -207,7 +207,7 @@ RADEONInitCrtcBase(xf86CrtcPtr crtc, RADEONSavePtr save,
Base = pScrn->fbOffset;
- if (info->tilingEnabled) {
+ if (info->tilingEnabled && (crtc->rotatedData == NULL)) {
if (IS_R300_VARIANT) {
/* On r300/r400 when tiling is enabled crtc_offset is set to the
address of
* the surface. the x/y offsets are handled by the X_Y tile reg for
each crtc
@@ -249,6 +249,10 @@ RADEONInitCrtcBase(xf86CrtcPtr crtc, RADEONSavePtr save,
Base += offset;
}
+ if (crtc->rotatedData != NULL) {
+ Base = pScrn->fbOffset + (char *)crtc->rotatedData - (char *)info->FB;
+ }
+
Base &= ~7; /* 3 lower bits are always 0 */
@@ -419,7 +423,7 @@ RADEONInitCrtc2Base(xf86CrtcPtr crtc, RADEONSavePtr save,
#endif
save->crtc2_offset_cntl = 0;
- if (info->tilingEnabled) {
+ if (info->tilingEnabled && (crtc->rotatedData == NULL)) {
if (IS_R300_VARIANT)
save->crtc2_offset_cntl |= (R300_CRTC_X_Y_MODE_EN |
R300_CRTC_MICRO_TILE_BUFFER_DIS |
@@ -438,7 +442,7 @@ RADEONInitCrtc2Base(xf86CrtcPtr crtc, RADEONSavePtr save,
Base = pScrn->fbOffset;
- if (info->tilingEnabled) {
+ if (info->tilingEnabled && (crtc->rotatedData == NULL)) {
if (IS_R300_VARIANT) {
/* On r300/r400 when tiling is enabled crtc_offset is set to the
address of
* the surface. the x/y offsets are handled by the X_Y tile reg for
each crtc
@@ -480,6 +484,10 @@ RADEONInitCrtc2Base(xf86CrtcPtr crtc, RADEONSavePtr save,
Base += offset;
}
+ if (crtc->rotatedData != NULL) {
+ Base = pScrn->fbOffset + (char *)crtc->rotatedData - (char *)info->FB;
+ }
+
Base &= ~7; /* 3 lower bits are always 0 */
#ifdef XF86DRI
@@ -560,7 +568,7 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr
save,
? RADEON_CRTC2_V_SYNC_POL
: 0));
- save->crtc2_pitch = ((info->CurrentLayout.displayWidth *
pScrn->bitsPerPixel) +
+ save->crtc2_pitch = ((pScrn->displayWidth * pScrn->bitsPerPixel) +
((pScrn->bitsPerPixel * 8) -1)) /
(pScrn->bitsPerPixel * 8);
save->crtc2_pitch |= save->crtc2_pitch << 16;
commit 47eb3327c258bb0cfd9a1d5677624b9988a39057
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sun Aug 26 15:43:22 2007 -0400
RADEON: minor tweak to tv out
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index c5917bc..3a26a0a 100644
--- a/src/radeon_tv.c
+++ b/src/radeon_tv.c
@@ -343,7 +343,7 @@ void RADEONInitTVRegisters(xf86OutputPtr output,
RADEONSavePtr save,
| RADEON_SYNC_TIP_LEVEL
| RADEON_YFLT_EN
| RADEON_UVFLT_EN
- | (2 << RADEON_CY_FILT_BLEND_SHIFT);
+ | (6 << RADEON_CY_FILT_BLEND_SHIFT);
if (radeon_output->tvStd == TV_STD_NTSC ||
radeon_output->tvStd == TV_STD_NTSC_J) {
commit f36720377737210c985b196d9a988efdd767f1c7
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sun Aug 26 14:13:06 2007 -0400
RADEON: fix depth 16 palette for real this time
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 6a4116d..026cd8a 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -103,7 +103,7 @@ radeon_crtc_dpms(xf86CrtcPtr crtc, int mode)
}
if (mode != DPMSModeOff)
- radeon_crtc_load_lut(crtc);
+ radeon_crtc_load_lut(crtc);
}
static Bool
@@ -911,21 +911,8 @@ void radeon_crtc_load_lut(xf86CrtcPtr crtc)
PAL_SELECT(radeon_crtc->crtc_id);
- if (pScrn->depth == 15) {
- for (i = 0; i < 32; i++) {
- OUTPAL(i * 8, radeon_crtc->lut_r[i], radeon_crtc->lut_g[i],
radeon_crtc->lut_b[i]);
- }
- } else if (pScrn->depth == 16) {
- for (i = 0; i < 64; i++) {
- OUTPAL(i * 4, radeon_crtc->lut_r[i], radeon_crtc->lut_g[i],
radeon_crtc->lut_b[i]);
- if (i <= 31) {
- OUTPAL(i * 8, radeon_crtc->lut_r[i + 64], radeon_crtc->lut_g[i
+ 64], radeon_crtc->lut_b[i + 64]);
- }
- }
- } else {
- for (i = 0; i < 256; i++) {
- OUTPAL(i, radeon_crtc->lut_r[i], radeon_crtc->lut_g[i],
radeon_crtc->lut_b[i]);
- }
+ for (i = 0; i < 256; i++) {
+ OUTPAL(i, radeon_crtc->lut_r[i], radeon_crtc->lut_g[i],
radeon_crtc->lut_b[i]);
}
}
@@ -937,17 +924,19 @@ radeon_crtc_gamma_set(xf86CrtcPtr crtc, CARD16 *red,
CARD16 *green,
{
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
ScrnInfoPtr pScrn = crtc->scrn;
- int i;
+ int i, j;
if (pScrn->depth == 16) {
for (i = 0; i < 64; i++) {
- radeon_crtc->lut_r[i] = red[i/2] >> 8;
- radeon_crtc->lut_g[i] = green[i] >> 8;
- radeon_crtc->lut_b[i] = blue[i/2] >> 8;
if (i <= 31) {
- radeon_crtc->lut_r[i + 64] = red[i] >> 8;
- radeon_crtc->lut_g[i + 64] = green[(i * 2) + 1] >> 8;
- radeon_crtc->lut_b[i + 64] = blue[i] >> 8;
+ for (j = 0; j < 8; j++) {
+ radeon_crtc->lut_r[i * 8 + j] = red[i] >> 8;
+ radeon_crtc->lut_b[i * 8 + j] = blue[i] >> 8;
+ }
+ }
+
+ for (j = 0; j < 4; j++) {
+ radeon_crtc->lut_g[i * 4 + j] = green[i] >> 8;
}
}
} else {
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index e445b9e..158e1e4 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -2856,7 +2856,7 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int
numColors,
case 16:
for (i = 0; i < numColors; i++) {
index = indices[i];
-
+
if (i <= 31) {
for (j = 0; j < 8; j++) {
lut_r[index * 8 + j] = colors[index].red << 8;
@@ -2874,7 +2874,7 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int
numColors,
lut_r[index] = colors[index].red << 8;
lut_g[index] = colors[index].green << 8;
lut_b[index] = colors[index].blue << 8;
- }
+ }
break;
}
commit f2b13f1457bf860b075310d3962254be0ed7bea3
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sun Aug 26 13:27:19 2007 -0400
RADEON: Only update pixclks_cntl when updating tv routing
No need to re-set all of the pll2 stuff
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index d42e482..6a4116d 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -752,6 +752,13 @@ RADEONInitPLL2Registers(ScrnInfoPtr pScrn, RADEONSavePtr
save,
}
static void
+radeon_update_tv_routing(ScrnInfoPtr pScrn, RADEONSavePtr restore)
+{
+ /* pixclks_cntl controls tv clock routing */
+ OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, restore->pixclks_cntl);
+}
+
+static void
radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
DisplayModePtr adjusted_mode, int x, int y)
{
@@ -867,7 +874,7 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
/* pixclks_cntl handles tv-out clock routing */
if (update_tv_routing)
- RADEONRestorePLL2Registers(pScrn, &info->ModeReg);
+ radeon_update_tv_routing(pScrn, &info->ModeReg);
if (info->DispPriority)
RADEONInitDispBandwidth(pScrn);
commit 5d044b9f74c7aa7e12f2822896fed881e2ca9d19
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sat Aug 25 21:03:08 2007 -0400
RADEON: fix crtc clipping for Xv
diff --git a/src/radeon_video.c b/src/radeon_video.c
index 5cbe9fc..271f7fe 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -1562,7 +1562,7 @@ RADEONSetupImageVideo(ScreenPtr pScreen)
return NULL;
adapt->type = XvWindowMask | XvInputMask | XvImageMask;
- adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
+ adapt->flags = VIDEO_OVERLAID_IMAGES /*| VIDEO_CLIP_TO_VIEWPORT*/;
adapt->name = "ATI Radeon Video Overlay";
adapt->nEncodings = 1;
adapt->pEncodings = &DummyEncoding;
@@ -3330,8 +3330,8 @@ RADEONInitOffscreenImages(ScreenPtr pScreen)
return;
offscreenImages[0].image = &Images[0];
- offscreenImages[0].flags = VIDEO_OVERLAID_IMAGES |
- VIDEO_CLIP_TO_VIEWPORT;
+ offscreenImages[0].flags = VIDEO_OVERLAID_IMAGES /*|
+ VIDEO_CLIP_TO_VIEWPORT*/;
offscreenImages[0].alloc_surface = RADEONAllocateSurface;
offscreenImages[0].free_surface = RADEONFreeSurface;
offscreenImages[0].display = RADEONDisplaySurface;
commit 3fd2d22a02812d5f86cdc1c9503f48362b0c362b
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sat Aug 25 17:37:35 2007 -0400
RADEON: remove fbdev option
FBDev support is currently broken, and it not really compatible
with randr
diff --git a/man/radeon.man b/man/radeon.man
index 8423cc9..88665bf 100644
--- a/man/radeon.man
+++ b/man/radeon.man
@@ -150,14 +150,6 @@ affects the "true" overlay via xv, it won't affect things
like textured video.
.br
The default value is either 1536 (for most chips) or 1920.
.TP
-.BI "Option \*qUseFBDev\*q \*q" boolean \*q
-Enable or disable use of an OS\-specific framebuffer device interface
-(which is not supported on all OSs). MergedFB does not work when this
-option is in use. See fbdevhw(__drivermansuffix__) for further information.
-.br
-The default is
-.B off.
-.TP
.BI "Option \*qAGPMode\*q \*q" integer \*q
Set AGP data transfer rate.
(used only when DRI is enabled)
diff --git a/src/radeon.h b/src/radeon.h
index 6f880b8..53fb5f7 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -123,7 +123,6 @@ typedef enum {
#endif
OPTION_DDC_MODE,
OPTION_IGNORE_EDID,
- OPTION_FBDEV,
OPTION_DISP_PRIORITY,
OPTION_PANEL_SIZE,
OPTION_MIN_DOTCLOCK,
@@ -437,8 +436,6 @@ typedef struct {
RADEONChipFamily ChipFamily;
RADEONErrata ChipErrata;
- Bool FBDev;
-
unsigned long LinearAddr; /* Frame buffer physical address */
unsigned long MMIOAddr; /* MMIO region physical address */
unsigned long BIOSAddr; /* BIOS physical address */
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 3ee7760..d42e482 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -36,7 +36,6 @@
/* X and server generic header files */
#include "xf86.h"
#include "xf86_OSproc.h"
-#include "fbdevhw.h"
#include "vgaHW.h"
#include "xf86Modes.h"
diff --git a/src/radeon_display.c b/src/radeon_display.c
index ed20409..ed45d79 100644
--- a/src/radeon_display.c
+++ b/src/radeon_display.c
@@ -36,7 +36,6 @@
/* X and server generic header files */
#include "xf86.h"
#include "xf86_OSproc.h"
-#include "fbdevhw.h"
#include "vgaHW.h"
#include "xf86Modes.h"
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index a111e0d..e445b9e 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -98,11 +98,10 @@
#include "xf86cmap.h"
#include "vbe.h"
- /* fbdevhw * vgaHW definitions */
+ /* vgaHW definitions */
#ifdef WITH_VGAHW
#include "vgaHW.h"
#endif
-#include "fbdevhw.h"
#define DPMS_SERVER
#include <X11/extensions/dpms.h>
@@ -159,7 +158,6 @@ static const OptionInfoRec RADEONOptions[] = {
#endif
{ OPTION_DDC_MODE, "DDCMode", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_IGNORE_EDID, "IgnoreEDID", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_FBDEV, "UseFBDev", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_DISP_PRIORITY, "DisplayPriority", OPTV_ANYSTR, {0}, FALSE },
{ OPTION_PANEL_SIZE, "PanelSize", OPTV_ANYSTR, {0}, FALSE },
{ OPTION_MIN_DOTCLOCK, "ForceMinDotClock", OPTV_FREQ, {0}, FALSE },
@@ -208,34 +206,6 @@ static const char *vgahwSymbols[] = {
};
#endif
-static const char *fbdevHWSymbols[] = {
- "fbdevHWInit",
- "fbdevHWUseBuildinMode",
-
- "fbdevHWGetVidmem",
-
- "fbdevHWDPMSSet",
-
- /* colormap */
- "fbdevHWLoadPalette",
- /* ScrnInfo hooks */
- "fbdevHWAdjustFrame",
- "fbdevHWEnterVT",
- "fbdevHWLeaveVT",
- "fbdevHWModeInit",
- "fbdevHWRestore",
- "fbdevHWSave",
- "fbdevHWSwitchMode",
- "fbdevHWValidModeWeak",
-
- "fbdevHWMapMMIO",
- "fbdevHWMapVidmem",
- "fbdevHWUnmapMMIO",
- "fbdevHWUnmapVidmem",
-
- NULL
-};
-
static const char *ddcSymbols[] = {
"xf86PrintEDID",
"xf86DoEDID_DDC1",
@@ -396,7 +366,6 @@ void RADEONLoaderRefSymLists(void)
drmSymbols,
driSymbols,
#endif
- fbdevHWSymbols,
vbeSymbols,
int10Symbols,
i2cSymbols,
@@ -553,15 +522,11 @@ static Bool RADEONMapMMIO(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- if (info->FBDev) {
- info->MMIO = fbdevHWMapMMIO(pScrn);
- } else {
- info->MMIO = xf86MapPciMem(pScrn->scrnIndex,
- VIDMEM_MMIO | VIDMEM_READSIDEEFFECT,
- info->PciTag,
- info->MMIOAddr,
- info->MMIOSize);
- }
+ info->MMIO = xf86MapPciMem(pScrn->scrnIndex,
+ VIDMEM_MMIO | VIDMEM_READSIDEEFFECT,
+ info->PciTag,
+ info->MMIOAddr,
+ info->MMIOSize);
if (!info->MMIO) return FALSE;
return TRUE;
@@ -574,11 +539,8 @@ static Bool RADEONUnmapMMIO(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- if (info->FBDev)
- fbdevHWUnmapMMIO(pScrn);
- else {
- xf86UnMapVidMem(pScrn->scrnIndex, info->MMIO, info->MMIOSize);
- }
+ xf86UnMapVidMem(pScrn->scrnIndex, info->MMIO, info->MMIOSize);
+
info->MMIO = NULL;
return TRUE;
}
@@ -588,17 +550,13 @@ static Bool RADEONMapFB(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- if (info->FBDev) {
- info->FB = fbdevHWMapVidmem(pScrn);
- } else {
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
- "Map: 0x%08lx, 0x%08lx\n", info->LinearAddr,
info->FbMapSize);
- info->FB = xf86MapPciMem(pScrn->scrnIndex,
- VIDMEM_FRAMEBUFFER,
- info->PciTag,
- info->LinearAddr,
- info->FbMapSize);
- }
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
+ "Map: 0x%08lx, 0x%08lx\n", info->LinearAddr,
info->FbMapSize);
+ info->FB = xf86MapPciMem(pScrn->scrnIndex,
+ VIDMEM_FRAMEBUFFER,
+ info->PciTag,
+ info->LinearAddr,
+ info->FbMapSize);
if (!info->FB) return FALSE;
return TRUE;
@@ -609,10 +567,7 @@ static Bool RADEONUnmapFB(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- if (info->FBDev)
- fbdevHWUnmapVidmem(pScrn);
- else
- xf86UnMapVidMem(pScrn->scrnIndex, info->FB, info->FbMapSize);
+ xf86UnMapVidMem(pScrn->scrnIndex, info->FB, info->FbMapSize);
info->FB = NULL;
return TRUE;
}
@@ -1211,8 +1166,7 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
}
#endif
- /* We won't try to change MC_FB_LOCATION when using fbdev */
- if (!info->FBDev) {
+ {
if (info->IsIGP)
info->mc_fb_location = INREG(RADEON_NB_TOM);
else
@@ -1380,9 +1334,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn)
MessageType from = X_PROBED;
CARD32 accessible, bar_size;
- if (info->FBDev)
- pScrn->videoRam = fbdevHWGetVidmem(pScrn) / 1024;
- else if ((info->IsIGP)) {
+ if ((info->IsIGP)) {
CARD32 tom = INREG(RADEON_NB_TOM);
pScrn->videoRam = (((tom >> 16) -
@@ -2293,12 +2245,7 @@ static void RADEONPreInitColorTiling(ScrnInfoPtr pScrn)
}
#endif /* XF86DRI */
- if ((info->allowColorTiling) && (info->FBDev)) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Color tiling not supported with UseFBDev option\n");
- info->allowColorTiling = FALSE;
- }
- else if (info->allowColorTiling) {
+ if (info->allowColorTiling) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Color tiling enabled by
default\n");
} else {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Color tiling disabled\n");
@@ -2715,30 +2662,8 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int
flags)
"X server will %skeep DPI constant for all screen sizes\n",
info->constantDPI ? "" : "not ");
- if (xf86ReturnOptValBool(info->Options, OPTION_FBDEV, FALSE)) {
- /* check for Linux framebuffer device */
-
- if (xf86LoadSubModule(pScrn, "fbdevhw")) {
- xf86LoaderReqSymLists(fbdevHWSymbols, NULL);
-
- if (fbdevHWInit(pScrn, info->PciInfo, NULL)) {
- pScrn->ValidMode = fbdevHWValidModeWeak();
- info->FBDev = TRUE;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Using framebuffer device\n");
- } else {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "fbdevHWInit failed, not using framebuffer
device\n");
- }
- } else {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Couldn't load fbdevhw module, not using framebuffer
device\n");
- }
- }
-
- if (!info->FBDev)
- if (!RADEONPreInitInt10(pScrn, &pInt10))
- goto fail;
+ if (!RADEONPreInitInt10(pScrn, &pInt10))
+ goto fail;
RADEONPostInt10Check(pScrn, int10_save);
@@ -2906,9 +2831,7 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int
numColors,
if (info->accelOn && pScrn->pScreen)
RADEON_SYNC(info, pScrn);
- if (info->FBDev) {
- fbdevHWLoadPalette(pScrn, numColors, indices, colors, pVisual);
- } else {
+ {
for (c = 0; c < xf86_config->num_crtc; c++) {
xf86CrtcPtr crtc = xf86_config->crtc[c];
@@ -3365,6 +3288,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
RADEONInfoPtr info = RADEONPTR(pScrn);
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
int hasDRI = 0;
+ int i;
#ifdef RENDER
int subPixelOrder = SubPixelUnknown;
char* s;
@@ -3465,11 +3389,11 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
/* empty the surfaces */
unsigned char *RADEONMMIO = info->MMIO;
- unsigned int i;
- for (i = 0; i < 8; i++) {
- OUTREG(RADEON_SURFACE0_INFO + 16 * i, 0);
- OUTREG(RADEON_SURFACE0_LOWER_BOUND + 16 * i, 0);
- OUTREG(RADEON_SURFACE0_UPPER_BOUND + 16 * i, 0);
+ unsigned int j;
+ for (j = 0; j < 8; j++) {
+ OUTREG(RADEON_SURFACE0_INFO + 16 * j, 0);
+ OUTREG(RADEON_SURFACE0_LOWER_BOUND + 16 * j, 0);
+ OUTREG(RADEON_SURFACE0_UPPER_BOUND + 16 * j, 0);
}
#ifdef XF86DRI
@@ -3642,35 +3566,22 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
#endif
pScrn->vtSema = TRUE;
- if (info->FBDev) {
- unsigned char *RADEONMMIO = info->MMIO;
- if (!fbdevHWModeInit(pScrn, pScrn->currentMode)) return FALSE;
- pScrn->displayWidth = fbdevHWGetLineLength(pScrn)
- / info->CurrentLayout.pixel_bytes;
- RADEONSaveMemMapRegisters(pScrn, &info->ModeReg);
- info->fbLocation = (info->ModeReg.mc_fb_location & 0xffff) << 16;
- info->ModeReg.surface_cntl = INREG(RADEON_SURFACE_CNTL);
- info->ModeReg.surface_cntl &= ~RADEON_SURF_TRANSLATION_DIS;
- } else {
- int i;
- for (i = 0; i < xf86_config->num_crtc; i++)
- {
- xf86CrtcPtr crtc = xf86_config->crtc[i];
+ for (i = 0; i < xf86_config->num_crtc; i++) {
+ xf86CrtcPtr crtc = xf86_config->crtc[i];
- /* Mark that we'll need to re-set the mode for sure */
- memset(&crtc->mode, 0, sizeof(crtc->mode));
- if (!crtc->desiredMode.CrtcHDisplay) {
- crtc->desiredMode = *RADEONCrtcFindClosestMode (crtc,
pScrn->currentMode);
- crtc->desiredRotation = RR_Rotate_0;
- crtc->desiredX = 0;
- crtc->desiredY = 0;
- }
+ /* Mark that we'll need to re-set the mode for sure */
+ memset(&crtc->mode, 0, sizeof(crtc->mode));
+ if (!crtc->desiredMode.CrtcHDisplay) {
+ crtc->desiredMode = *RADEONCrtcFindClosestMode (crtc,
pScrn->currentMode);
+ crtc->desiredRotation = RR_Rotate_0;
+ crtc->desiredX = 0;
+ crtc->desiredY = 0;
+ }
- if (!xf86CrtcSetMode (crtc, &crtc->desiredMode,
crtc->desiredRotation, crtc->desiredX, crtc->desiredY))
- return FALSE;
+ if (!xf86CrtcSetMode (crtc, &crtc->desiredMode, crtc->desiredRotation,
crtc->desiredX, crtc->desiredY))
+ return FALSE;
- }
}
RADEONSaveScreen(pScreen, SCREEN_SAVER_ON);
@@ -4090,32 +4001,6 @@ void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn,
}
}
-/* Write miscellaneous registers which might have been destroyed by an fbdevHW
- * call
- */
-static void RADEONRestoreFBDevRegisters(ScrnInfoPtr pScrn,
- RADEONSavePtr restore)
-{
-#ifdef XF86DRI
- RADEONInfoPtr info = RADEONPTR(pScrn);
- RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
- unsigned char *RADEONMMIO = info->MMIO;
-
- /* Restore register for vertical blank interrupts */
- if (info->irq) {
- OUTREG(RADEON_GEN_INT_CNTL, restore->gen_int_cntl);
- }
-
- /* Restore registers for page flipping */
- if (info->allowPageFlip) {
- OUTREG(RADEON_CRTC_OFFSET_CNTL, restore->crtc_offset_cntl);
- if (pRADEONEnt->HasCRTC2) {
- OUTREG(RADEON_CRTC2_OFFSET_CNTL, restore->crtc2_offset_cntl);
- }
- }
-#endif
-}
-
void RADEONRestoreDACRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr restore)
{
@@ -5079,29 +4964,6 @@ static void RADEONSaveCommonRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr save)
save->grph2_buffer_cntl = INREG(RADEON_GRPH2_BUFFER_CNTL);
}
-/* Read miscellaneous registers which might be destroyed by an fbdevHW call */
-static void RADEONSaveFBDevRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
-{
-#ifdef XF86DRI
- RADEONInfoPtr info = RADEONPTR(pScrn);
- RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
- unsigned char *RADEONMMIO = info->MMIO;
-
- /* Save register for vertical blank interrupts */
- if (info->irq) {
- save->gen_int_cntl = INREG(RADEON_GEN_INT_CNTL);
- }
-
- /* Save registers for page flipping */
- if (info->allowPageFlip) {
- save->crtc_offset_cntl = INREG(RADEON_CRTC_OFFSET_CNTL);
- if (pRADEONEnt->HasCRTC2) {
- save->crtc2_offset_cntl = INREG(RADEON_CRTC2_OFFSET_CNTL);
- }
- }
-#endif
-}
-
/* Read CRTC registers */
static void RADEONSaveCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
{
@@ -5411,13 +5273,6 @@ static void RADEONSave(ScrnInfoPtr pScrn)
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"RADEONSave\n");
- if (info->FBDev) {
- RADEONSaveMemMapRegisters(pScrn, save);
- fbdevHWSave(pScrn);
- return;
- }
-
-
#ifdef WITH_VGAHW
if (info->VGAAccess) {
vgaHWPtr hwp = VGAHWPTR(pScrn);
@@ -5464,10 +5319,6 @@ void RADEONRestore(ScrnInfoPtr pScrn)
OUTREG(RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_NONE);
#endif
- if (info->FBDev) {
- fbdevHWRestore(pScrn);
- return;
- }
RADEONBlank(pScrn);
OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
@@ -5635,17 +5486,7 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr
mode, int flags)
if (info->accelOn)
RADEON_SYNC(info, pScrn);
- if (info->FBDev) {
- RADEONSaveFBDevRegisters(pScrn, &info->ModeReg);
-
- ret = fbdevHWSwitchMode(scrnIndex, mode, flags);
- pScrn->displayWidth = fbdevHWGetLineLength(pScrn)
- / info->CurrentLayout.pixel_bytes;
-
- RADEONRestoreFBDevRegisters(pScrn, &info->ModeReg);
- } else {
- ret = xf86SetSingleMode (pScrn, mode, RR_Rotate_0);
- }
+ ret = xf86SetSingleMode (pScrn, mode, RR_Rotate_0);
if (info->tilingEnabled != tilingOld) {
/* need to redraw front buffer, I guess this can be considered a hack ?
*/
@@ -5841,14 +5682,10 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int
flags)
RADEON_SYNC(info, pScrn);
if (crtc && crtc->enabled) {
- if (info->FBDev) {
- fbdevHWAdjustFrame(scrnIndex, crtc->desiredX + x, crtc->desiredY +
y, flags);
- } else {
- if (crtc == pRADEONEnt->pCrtc[0])
- RADEONDoAdjustFrame(pScrn, crtc->desiredX + x, crtc->desiredY +
y, FALSE);
- else
- RADEONDoAdjustFrame(pScrn, crtc->desiredX + x, crtc->desiredY +
y, TRUE);
- }
+ if (crtc == pRADEONEnt->pCrtc[0])
+ RADEONDoAdjustFrame(pScrn, crtc->desiredX + x, crtc->desiredY + y,
FALSE);
+ else
+ RADEONDoAdjustFrame(pScrn, crtc->desiredX + x, crtc->desiredY + y,
TRUE);
crtc->x = output->initial_x + x;
crtc->y = output->initial_y + y;
}
@@ -5868,11 +5705,12 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+ int i;
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"RADEONEnterVT\n");
- if (!info->FBDev && (INREG(RADEON_CONFIG_MEMSIZE) == 0)) { /* Softboot
V_BIOS */
+ if ((INREG(RADEON_CONFIG_MEMSIZE)) == 0) { /* Softboot V_BIOS */
xf86Int10InfoPtr pInt;
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"zero MEMSIZE, probably at D3cold. Re-POSTing via int10.\n");
@@ -5887,34 +5725,22 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
/* Makes sure the engine is idle before doing anything */
RADEONWaitForIdleMMIO(pScrn);
- if (info->FBDev) {
- unsigned char *RADEONMMIO = info->MMIO;
- if (!fbdevHWEnterVT(scrnIndex,flags)) return FALSE;
- info->PaletteSavedOnVT = FALSE;
- info->ModeReg.surface_cntl = INREG(RADEON_SURFACE_CNTL);
-
- RADEONRestoreFBDevRegisters(pScrn, &info->ModeReg);
- } else {
- int i;
-
- pScrn->vtSema = TRUE;
- for (i = 0; i < xf86_config->num_crtc; i++)
- {
- xf86CrtcPtr crtc = xf86_config->crtc[i];
- /* Mark that we'll need to re-set the mode for sure */
- memset(&crtc->mode, 0, sizeof(crtc->mode));
- if (!crtc->desiredMode.CrtcHDisplay) {
- crtc->desiredMode = *RADEONCrtcFindClosestMode (crtc,
pScrn->currentMode);
- crtc->desiredRotation = RR_Rotate_0;
- crtc->desiredX = 0;
- crtc->desiredY = 0;
- }
+ pScrn->vtSema = TRUE;
+ for (i = 0; i < xf86_config->num_crtc; i++) {
+ xf86CrtcPtr crtc = xf86_config->crtc[i];
+ /* Mark that we'll need to re-set the mode for sure */
+ memset(&crtc->mode, 0, sizeof(crtc->mode));
+ if (!crtc->desiredMode.CrtcHDisplay) {
+ crtc->desiredMode = *RADEONCrtcFindClosestMode (crtc,
pScrn->currentMode);
+ crtc->desiredRotation = RR_Rotate_0;
+ crtc->desiredX = 0;
+ crtc->desiredY = 0;
+ }
- if (!xf86CrtcSetMode (crtc, &crtc->desiredMode,
crtc->desiredRotation,
- crtc->desiredX, crtc->desiredY))
- return FALSE;
+ if (!xf86CrtcSetMode (crtc, &crtc->desiredMode, crtc->desiredRotation,
+ crtc->desiredX, crtc->desiredY))
+ return FALSE;
- }
}
RADEONRestoreSurfaces(pScrn, &info->ModeReg);
@@ -5960,7 +5786,6 @@ void RADEONLeaveVT(int scrnIndex, int flags)
{
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
RADEONInfoPtr info = RADEONPTR(pScrn);
- RADEONSavePtr save = &info->ModeReg;
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"RADEONLeaveVT\n");
@@ -5992,15 +5817,6 @@ void RADEONLeaveVT(int scrnIndex, int flags)
}
#endif
- if (info->FBDev) {
- RADEONSavePalette(pScrn, save);
- info->PaletteSavedOnVT = TRUE;
-
- RADEONSaveFBDevRegisters(pScrn, &info->ModeReg);
-
- fbdevHWLeaveVT(scrnIndex,flags);
- }
-
RADEONRestore(pScrn);
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 1f38b3b..c2b749a 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -36,7 +36,6 @@
/* X and server generic header files */
#include "xf86.h"
#include "xf86_OSproc.h"
-#include "fbdevhw.h"
#include "vgaHW.h"
#include "xf86Modes.h"
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index bc2905a..c5917bc 100644
--- a/src/radeon_tv.c
+++ b/src/radeon_tv.c
@@ -13,7 +13,6 @@
/* X and server generic header files */
#include "xf86.h"
#include "xf86_OSproc.h"
-#include "fbdevhw.h"
#include "vgaHW.h"
#include "xf86Modes.h"
commit 3469e1aa08792890fa6a5c72da52a1992a0b382c
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Fri Aug 24 20:42:13 2007 -0400
RADEON: add extra green data in depth 16
Apparently some radeons need this?
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 6211b02..3ee7760 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -912,6 +912,9 @@ void radeon_crtc_load_lut(xf86CrtcPtr crtc)
} else if (pScrn->depth == 16) {
for (i = 0; i < 64; i++) {
OUTPAL(i * 4, radeon_crtc->lut_r[i], radeon_crtc->lut_g[i],
radeon_crtc->lut_b[i]);
+ if (i <= 31) {
+ OUTPAL(i * 8, radeon_crtc->lut_r[i + 64], radeon_crtc->lut_g[i
+ 64], radeon_crtc->lut_b[i + 64]);
+ }
}
} else {
for (i = 0; i < 256; i++) {
@@ -935,6 +938,11 @@ radeon_crtc_gamma_set(xf86CrtcPtr crtc, CARD16 *red,
CARD16 *green,
radeon_crtc->lut_r[i] = red[i/2] >> 8;
radeon_crtc->lut_g[i] = green[i] >> 8;
radeon_crtc->lut_b[i] = blue[i/2] >> 8;
+ if (i <= 31) {
+ radeon_crtc->lut_r[i + 64] = red[i] >> 8;
+ radeon_crtc->lut_g[i + 64] = green[(i * 2) + 1] >> 8;
+ radeon_crtc->lut_b[i + 64] = blue[i] >> 8;
+ }
}
} else {
for (i = 0; i < 256; i++) {
commit 71f650d1bc432514516f7ac64a5e8a54c5227881
Author: Michel Dänzer <[EMAIL PROTECTED]>
Date: Fri Aug 24 09:21:39 2007 +0200
Require xorg-server >= 1.3 for RandR 1.2.
diff --git a/configure.ac b/configure.ac
index b178224..cdc6377 100644
--- a/configure.ac
+++ b/configure.ac
@@ -71,7 +71,7 @@ XORG_DRIVER_CHECK_EXT(XF86MISC, xf86miscproto)
XORG_DRIVER_CHECK_EXT(DPMSExtension, xextproto)
# Checks for pkg-config packages
-PKG_CHECK_MODULES(XORG, [xorg-server xproto fontsproto $REQUIRED_MODULES])
+PKG_CHECK_MODULES(XORG, [xorg-server >= 1.3 xproto fontsproto
$REQUIRED_MODULES])
sdkdir=$(pkg-config --variable=sdkdir xorg-server)
# Checks for libraries.
commit d7230939f523610c57f92bdfc72966bdbc6f1070
Author: Michel Dänzer <[EMAIL PROTECTED]>
Date: Fri Aug 24 09:21:14 2007 +0200
64 bit warning fixes.
For printf vs. CARD32, use %u or %x and and a cast to unsigned.
diff --git a/src/atidri.c b/src/atidri.c
index d4fbead..07adda7 100644
--- a/src/atidri.c
+++ b/src/atidri.c
@@ -1269,9 +1269,10 @@ Bool ATIDRIScreenInit( ScreenPtr pScreen )
ErrorF( "[dri] Data does not fit in SAREA\n" );
return FALSE;
}
- xf86DrvMsg( pScreenInfo->scrnIndex, X_INFO, "[drm] SAREA %d+%d: %d\n",
- sizeof(XF86DRISAREARec), sizeof(ATISAREAPrivRec),
- sizeof(XF86DRISAREARec) + sizeof(ATISAREAPrivRec) );
+ xf86DrvMsg( pScreenInfo->scrnIndex, X_INFO, "[drm] SAREA %u+%u: %u\n",
+ (unsigned)sizeof(XF86DRISAREARec),
+ (unsigned)sizeof(ATISAREAPrivRec),
+ (unsigned)(sizeof(XF86DRISAREARec) + sizeof(ATISAREAPrivRec)) );
pDRIInfo->SAREASize = SAREA_MAX;
pATIDRI = (ATIDRIPtr) xnfcalloc( sizeof(ATIDRIRec), 1 );
diff --git a/src/radeon_bios.c b/src/radeon_bios.c
index 7dcb5d5..1ef0ff4 100644
--- a/src/radeon_bios.c
+++ b/src/radeon_bios.c
@@ -653,8 +653,11 @@ Bool RADEONGetClockInfoFromBIOS (ScrnInfoPtr pScrn)
if (info->sclk == 0) info->sclk = 200;
if (info->mclk == 0) info->mclk = 200;
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ref_freq: %d, min_pll: %ld,
max_pll: %ld, xclk: %d, sclk: %f, mclk: %f\n",
- pll->reference_freq, pll->min_pll_freq,
pll->max_pll_freq, pll->xclk, info->sclk, info->mclk);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ref_freq: %d, min_pll: %u, "
+ "max_pll: %u, xclk: %d, sclk: %f, mclk: %f\n",
+ pll->reference_freq, (unsigned)pll->min_pll_freq,
+ (unsigned)pll->max_pll_freq, pll->xclk, info->sclk,
+ info->mclk);
} else {
pll_info_block = RADEON_BIOS16 (info->ROMHeaderStart + 0x30);
--
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