ChangeLog | 380 ++++++++++++++++++++++++++++++++++++++
configure.ac | 2
debian/changelog | 14 +
man/radeon.man | 59 ++---
src/Makefile.am | 2
src/ati.c | 1
src/ati.h | 1
src/ati_pciids_gen.h | 13 +
src/atipciids.h | 1
src/atombios_output.c | 9
src/cayman_reg.h | 31 +--
src/drmmode_display.c | 52 +++--
src/drmmode_display.h | 10 -
src/evergreen_accel.c | 53 +++++
src/evergreen_exa.c | 147 +++++++++-----
src/evergreen_reg.h | 32 +--
src/pcidb/ati_pciids.csv | 13 +
src/r600_exa.c | 164 ++++++++++------
src/r600_reg.h | 35 +--
src/r6xx_accel.c | 4
src/radeon.h | 67 ------
src/radeon_bios.c | 2
src/radeon_chipinfo_gen.h | 13 +
src/radeon_chipset_gen.h | 13 +
src/radeon_commonfuncs.c | 6
src/radeon_dri.c | 30 ++-
src/radeon_dri2.c | 166 ++++++++++++----
src/radeon_driver.c | 14 +
src/radeon_exa_funcs.c | 18 +
src/radeon_kms.c | 36 ++-
src/radeon_pci_chipset_gen.h | 13 +
src/radeon_pci_device_match_gen.h | 13 +
src/radeon_probe.c | 29 ++
src/radeon_probe.h | 66 ++++++
src/radeon_textured_video.c | 2
src/radeon_video.c | 26 ++
src/radeon_video.h | 5
src/radeon_xvmc.c | 144 ++++++++++++++
src/theatre.c | 4
39 files changed, 1336 insertions(+), 354 deletions(-)
New commits:
commit 39635e5292aee3d51f5995d580179daa121f4c65
Author: Cyril Brulebois <k...@debian.org>
Date: Thu Nov 3 00:36:52 2011 +0100
Upload to unstable.
diff --git a/debian/changelog b/debian/changelog
index 998fb1f..53dc805 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,4 +1,4 @@
-xserver-xorg-video-ati (1:6.14.3-1) UNRELEASED; urgency=low
+xserver-xorg-video-ati (1:6.14.3-1) unstable; urgency=low
* New upstream release. Some highlights follow:
- Add support for llano APUs.
@@ -10,7 +10,7 @@ xserver-xorg-video-ati (1:6.14.3-1) UNRELEASED; urgency=low
- “EXA >= R6xx / KMS: Avoid running out of CS space at inconvenient
times” (Closes: #645007).
- -- Cyril Brulebois <k...@debian.org> Thu, 03 Nov 2011 00:26:53 +0100
+ -- Cyril Brulebois <k...@debian.org> Thu, 03 Nov 2011 00:36:47 +0100
xserver-xorg-video-ati (1:6.14.2-2) unstable; urgency=low
commit 0872229500257294b9e91ca8242edc58d028daeb
Author: Cyril Brulebois <k...@debian.org>
Date: Thu Nov 3 00:36:37 2011 +0100
Add some highlights to changelog, add Closes: #637258, #645007.
diff --git a/debian/changelog b/debian/changelog
index 25774f2..998fb1f 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,14 @@
xserver-xorg-video-ati (1:6.14.3-1) UNRELEASED; urgency=low
- * New upstream release.
+ * New upstream release. Some highlights follow:
+ - Add support for llano APUs.
+ - “video: Don't round up bottom/right edge for clipping source
+ width/height” (Closes: #637258).
+ - “Bail if we're trying to start up in UMS mode on KMS.” According to
+ a comment in the code, this can happen if the radeon kernel module
+ wasn't loaded before X starts.
+ - “EXA >= R6xx / KMS: Avoid running out of CS space at inconvenient
+ times” (Closes: #645007).
-- Cyril Brulebois <k...@debian.org> Thu, 03 Nov 2011 00:26:53 +0100
commit 01ad0ae19bcb210236373bc68767f17e7cd60a4c
Author: Cyril Brulebois <k...@debian.org>
Date: Thu Nov 3 00:27:07 2011 +0100
Bump changelogs.
diff --git a/ChangeLog b/ChangeLog
index a09e872..7f195e0 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,383 @@
+commit 93459f842c2d8dc178a1954b8e05150fcb96ac9a
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Wed Nov 2 12:51:15 2011 +0100
+
+ Bump version for 6.14.3 release.
+
+commit fe3ce559b7f07d39ded39abb38576846d6eb185b
+Author: Jeremy Huddleston <jerem...@apple.com>
+Date: Tue Nov 1 20:27:03 2011 -0700
+
+ Build fix for -Werror=int-to-pointer-cast
+
+ Signed-off-by: Jeremy Huddleston <jerem...@apple.com>
+
+commit d3d6a5da07aaec5961e51c9a8f90c1490ee101b6
+Author: Tormod Volden <debian.tor...@gmail.com>
+Date: Sat Oct 29 23:08:46 2011 +0200
+
+ radeon: do not include xf86PciInfo.h
+
+ We already use atipciids.h instead most places.
+
+ Signed-off-by: Tormod Volden <debian.tor...@gmail.com>
+
+commit 70da7001e81363ed6ef2c4727c512daf53ae29fe
+Author: Jeremy Huddleston <jerem...@apple.com>
+Date: Sat Oct 29 20:15:09 2011 -0700
+
+ Use malloc/calloc/realloc/free directly
+
+ Signed-off-by: Jeremy Huddleston <jerem...@apple.com>
+
+commit a3bb07efb1757c33d70e2e1928219d12a4dd6498
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Tue Oct 25 17:43:58 2011 +0200
+
+ EXA >= R6xx / KMS: Avoid running out of CS space at inconvenient times.
+
+ Otherwise we may end up with things not properly set up at the beginning
of the
+ next CS.
+
+ Fixes http://bugs.debian.org/645007 .
+
+ In contrast to the Composite code for < R6xx, this isn't necessary with
UMS,
+ as the draw packet only uses constant space in the indirect buffer, and
nothing
+ else can mess with the 3D state between indirect buffers.
+
+ Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
+ Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
+
+commit 23788c4a5e3b6affb9b183e1393edd0e5ca4550e
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Thu Oct 27 19:12:22 2011 +0200
+
+ EXA < R6xx: Make sure 2D state is re-emitted after running out of CS space.
+
+ Otherwise it's basically luck what the 2D state ends up being at the
beginning
+ of the next CS.
+
+ Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
+
+commit 6e0e1a821accc6ca95f4134e49b66a6b168c1934
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Tue Oct 25 17:39:57 2011 +0200
+
+ Make radeon_dri2_create_buffer(s) more robust. (Bug #30047)
+
+ In particular, handle and propagate failure to allocate GPU accessible
memory,
+ instead of crashing. Fixes
https://bugs.freedesktop.org/show_bug.cgi?id=30047 .
+
+ Also take care not to leak resources in error paths.
+
+ Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
+
+commit 856583dbca9319c77fed40daa9956e81a0068f9e
+Author: Jerome Glisse <jgli...@redhat.com>
+Date: Thu Oct 20 14:17:14 2011 -0400
+
+ radeon/kms: fallback to vesa if GPU is not supported by UMS
+
+ For GPU not supported by UMS, test in probe so that we properly
+ fallback to vesa.
+
+ Signed-off-by: Jerome Glisse <jgli...@redhat.com>
+ Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
+
+commit f6f1b4f7789cfef763c063e671b76b60be8bdd8e
+Author: Maarten Lankhorst <m.b.lankho...@gmail.com>
+Date: Tue Oct 18 14:30:39 2011 +0200
+
+ dri2: Add vdpau driver name entry
+
+ libvdpau has a driver loading mechanism that looks for a dri2 driver
+ first before falling back to nvidia, so lets use that.
+
+ Allows use of libvdpau_rx00 without having to set things up separately,
+ similar to the patch to xf86-video-nouveau.
+
+ Signed-off-by: Maarten Lankhorst <m.b.lankho...@gmail.com>
+ Reviewed-by: Christian König <deathsim...@vodafone.de>
+ Reviewed-by: Michel Dänzer <mic...@daenzer.net>
+ Tested-by: Michel Dänzer <mic...@daenzer.net>
+
+commit a6b2bd2d184f10d4c56c4ee17186aedb238a36ec
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Wed Sep 21 17:00:16 2011 -0400
+
+ UMS: fix DDIA enable on some rs690 systems
+
+ DVOOutputControl checks the value of of bios scratch reg 3
+ on some tables and assumes the encoder is already enabled
+ if the DFP2_ACTIVE bit is set. Clear that bit so the table
+ sets the DDIA enable bit properly.
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit d78860ba53d9bfcf6c28e1cfd2d970709b5e20fa
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Fri Aug 12 11:21:33 2011 +0200
+
+ Only call radeon_dri2_close_screen() if DRI2 was enabled.
+
+ Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
+
+commit 11330ca5dc61a70fe4507e63230f9133ca22d891
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Fri Aug 12 11:21:32 2011 +0200
+
+ Remove dead variable remain_size_bytes.
+
+ Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
+
+commit fcf0cca9c0ab0f692b222f619aee8f1cdad3b519
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Tue Sep 20 12:34:05 2011 +0200
+
+ KMS Color Tiling requires xserver which supports EXA_MIXED_PIXMAPS.
+
+ Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
+
+commit c96e6fb8a5f5be2319fdb4c431c1ba5279997fe8
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Sat Sep 17 08:26:12 2011 -0400
+
+ man: note that the list of marketing names is non-exhaustive
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit 1a51fce6f6ab169c882a86b936909c0820f27a68
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Thu Sep 15 17:52:25 2011 -0400
+
+ update man page with new marking names
+
+ Note that the driver support all currently
+ shipping asics and the names in the man page
+ are just a sampling.
+
+ Fixes:
+ https://bugs.freedesktop.org/show_bug.cgi?id=40808
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit 64f237a4cf3ef5bcb3163e88e1447ff275a1eefa
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Thu Aug 18 19:11:08 2011 +0200
+
+ Convert register ranges for >= r6xx from enums to defines.
+
+ Avoids lots of "comparison between 'enum <anonymous>' and 'enum
<anonymous>'"
+ warnings with newer versions of gcc. See
+ https://bugs.freedesktop.org/show_bug.cgi?id=38238 .
+
+ Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
+
+commit 95991fcce45f0dd904f76b9f98f9c7ed5708e4fa
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Wed Aug 17 11:10:34 2011 +0200
+
+ Bail if we're trying to start up in UMS mode on KMS.
+
+ Ideally, the display manager will start the X server again, and everything
+ will be fine and dandy. But in the worst case, at least we won't hit the
+ hardware behind the KMS driver's back.
+
+ (This change intentionally makes (ab)use of the fact that Bool is defined
as
+ int).
+
+ Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
+ Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
+
+commit f95a41b7851565c282d22f8d679db1377428f165
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Thu Aug 11 11:22:57 2011 +0200
+
+ video: Don't round up bottom/right edge for clipping source width/height.
+
+ It's not necessary: If the top/left edge was rounded down, this will be
+ compensated by the subtraction.
+
+ Worse, if the original source width/height is odd, rounding up may result
in
+ reading past the end of the source data.
+
+ Fixes http://bugs.debian.org/637258 .
+
+ Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
+ Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
+
+commit 93fc0843a1e31dc9237433bc2bf17df79e956d26
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Wed Aug 10 17:44:37 2011 +0200
+
+ Change my e-mail address to something that still works, and always will, I
hope.
+
+commit 9151f3b1c2ebcc34e63195888ba696f2183ba5e2
+Author: Michel Dänzer <michel.daen...@amd.com>
+Date: Tue Aug 9 19:13:26 2011 +0200
+
+ Prefer the CRTC of the primary output for synchronization.
+
+ See https://bugs.freedesktop.org/show_bug.cgi?id=39696 .
+
+ Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
+
+commit 3b9fdc807dd7e52af0576299cefba596040f6f2f
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Wed Aug 3 16:20:13 2011 -0400
+
+ r5xx+: Fix vline setup with crtc offsets
+
+ On r5xx+, vline is relative to to the viewport, not
+ the scanlines. Based on initial patch and investigation
+ from Herbert Pötzl (Bertl) on IRC.
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit 104b2d7c071f29266b1bc4184a74e9714d14febc
+Author: Alex Deucher <alexander.deuc...@amd.com>
+Date: Mon Aug 1 10:05:30 2011 -0400
+
+ kms: fix possible leak in pageflip code
+
+ Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
+
+commit d29bab632e9ecccba518d4107d52620bf75eb1cf
+Author: Ville Syrjala <syrj...@sci.fi>
+Date: Wed May 4 23:51:27 2011 +0300
+
+ kms: Move flip_count and co. to a per swap structure
+
+ If multiple drawables are doing page flipping, the global drmmode
+ structure can't be used to keep per swap information. For example
+ flip_count can increase prematurely due to another swap request,
+ and then the previous swap request never gets completed, leading to a
+ stuck client. Move the relevant pieces of data to a strucuture that
+ gets allocated once per swap request and shared by all involved CRTCs.
+
+ Signed-off-by: Ville Syrjala <syrj...@sci.fi>
+
+commit 9493563c1ef4b51af0ee8a44cb4e7c5bb280347e
+Author: Ville Syrjala <syrj...@sci.fi>
+Date: Wed May 4 23:51:26 2011 +0300
+
+ dri2: Update front buffer pixmap and name before exchanging buffers
+
+ Buffer exchange assumes that the front buffer pixmap and name
+ information is accurate. That may not be the case eg. if the window
+ has been (un)redirected since the buffer was created.
+
+ Signed-off-by: Ville Syrjala <syrj...@sci.fi>
+
+commit 8c9266ed2da22a510243f9a952c14d4423f48a2b
+Author: Alex Deucher <alexander.deuc...@amd.com>
+Date: Fri Jul 15 10:44:57 2011 -0400
+
+ radeon: add some new NI pci ids
+
+ Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
+
+commit f59c3b294b0f715fc96e2bbe25893f2b31aa488b
+Author: Christian König <deathsim...@vodafone.de>
+Date: Thu Jul 14 11:49:06 2011 +0200
+
+ Register XvMC video decoding acceleration
+
+commit e8d0d437957b15252dfad775796a3949ed50dbcf
+Author: Dave Airlie <airl...@redhat.com>
+Date: Tue Jul 12 11:43:25 2011 -0400
+
+ evergreen: Emit SQ_LDS_RESOURCE_MGMT
+
+ Avoids rendering problems when compute changes this reg.
+
+ Fixes:
+ https://bugs.freedesktop.org/show_bug.cgi?id=39119
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit 9bb31158466e6168116d841d12c8b4303f11c4a6
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Wed Jun 22 12:24:28 2011 -0400
+
+ evergreen: fix num_banks for 2D tiling config
+
+ The field is encoded.
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit 122b471f734aa07427b01d4bec35ff1ac28290b5
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Fri Jun 17 04:02:16 2011 -0400
+
+ dri2: fix copy pasto in a6154c00c64932332e8f6e334661ffd579cfd894
+
+ Reported-by: Nils Wallménius <nils.wallmen...@gmail.com>
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit 122bedcbcf45cb583cf51b2fd04ed2805e0ca60b
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Thu Jun 16 12:57:11 2011 -0400
+
+ dri2: missing bit from a6154c00c64932332e8f6e334661ffd579cfd894
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit a6154c00c64932332e8f6e334661ffd579cfd894
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Thu Jun 16 12:48:43 2011 -0400
+
+ dri2/eg+: fix size and alignment of depth/stencil buffers
+
+ Base alignment may be 256B or 512B depending on the group
+ size. Also need to check against front size for virtualX.
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit 41eb1fbb3d9da64feb4a96df7c575e44136b1538
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Mon Jun 13 12:50:39 2011 -0400
+
+ kms/man: update ColorTiling info
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit 481baa5c74271cd7ce38bae3965d2bc4b8809058
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Mon Jun 13 12:44:07 2011 -0400
+
+ kms: enable ColorTiling by default on r6xx-cayman asics
+
+ Currently only 1D tiling as 2D tiling still has some corner
+ cases to fix up.
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit cbcc57b0fa6f581be777bef648f2bf3efe7443ee
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Mon Apr 4 12:52:00 2011 -0400
+
+ radeon: add llano pci ids
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit 36afd1e1055eeadb2396dadcc68b214655bd90a9
+Author: Alex Deucher <alexdeuc...@gmail.com>
+Date: Tue May 31 16:03:36 2011 -0400
+
+ radeon: add support for llano APUs
+
+ - KMS only
+ - Includes full EXA/Xv support
+
+ Signed-off-by: Alex Deucher <alexdeuc...@gmail.com>
+
+commit 557f46dc2f18734ecf1f18dee7e951e0bf062e63
+Author: Dave Airlie <airl...@redhat.com>
+Date: Fri May 27 07:22:08 2011 +1000
+
+ bump version after release
+
commit 2fca40ea65d9f2a6f8451c324bb4b82786f34f76
Author: Dave Airlie <airl...@redhat.com>
Date: Thu May 26 12:52:21 2011 +1000
diff --git a/debian/changelog b/debian/changelog
index 44f9b58..25774f2 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,9 @@
+xserver-xorg-video-ati (1:6.14.3-1) UNRELEASED; urgency=low
+
+ * New upstream release.
+
+ -- Cyril Brulebois <k...@debian.org> Thu, 03 Nov 2011 00:26:53 +0100
+
xserver-xorg-video-ati (1:6.14.2-2) unstable; urgency=low
* Enable parallel building.
commit 93459f842c2d8dc178a1954b8e05150fcb96ac9a
Author: Michel Dänzer <michel.daen...@amd.com>
Date: Wed Nov 2 12:51:15 2011 +0100
Bump version for 6.14.3 release.
diff --git a/configure.ac b/configure.ac
index ec54478..167432c 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ([2.60])
AC_INIT([xf86-video-ati],
- [6.14.99],
+ [6.14.3],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
[xf86-video-ati])
commit fe3ce559b7f07d39ded39abb38576846d6eb185b
Author: Jeremy Huddleston <jerem...@apple.com>
Date: Tue Nov 1 20:27:03 2011 -0700
Build fix for -Werror=int-to-pointer-cast
Signed-off-by: Jeremy Huddleston <jerem...@apple.com>
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index f1ae65e..81dc08b 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -1581,7 +1581,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo->ddxDriverMajorVersion = info->allowColorTiling ? 5 : 4;
pDRIInfo->ddxDriverMinorVersion = 3;
pDRIInfo->ddxDriverPatchVersion = 0;
- pDRIInfo->frameBufferPhysicalAddress = (void *)info->LinearAddr +
info->dri->frontOffset;
+ pDRIInfo->frameBufferPhysicalAddress = (void *)(uintptr_t)info->LinearAddr
+ info->dri->frontOffset;
pDRIInfo->frameBufferSize = info->FbMapSize -
info->FbSecureSize;
pDRIInfo->frameBufferStride = (pScrn->displayWidth *
info->CurrentLayout.pixel_bytes);
commit d3d6a5da07aaec5961e51c9a8f90c1490ee101b6
Author: Tormod Volden <debian.tor...@gmail.com>
Date: Sat Oct 29 23:08:46 2011 +0200
radeon: do not include xf86PciInfo.h
We already use atipciids.h instead most places.
Signed-off-by: Tormod Volden <debian.tor...@gmail.com>
diff --git a/src/ati.c b/src/ati.c
index ea71e88..e1c136f 100644
--- a/src/ati.c
+++ b/src/ati.c
@@ -63,6 +63,7 @@
#include "atipcirename.h"
#include "ati.h"
+#include "atipciids.h"
#include "ativersion.h"
/* names duplicated from version headers */
diff --git a/src/ati.h b/src/ati.h
index 86c40a1..b7120d9 100644
--- a/src/ati.h
+++ b/src/ati.h
@@ -26,7 +26,6 @@
#include <unistd.h>
#include <stdint.h>
#include "xf86Pci.h"
-#include "xf86PciInfo.h"
#include "xf86.h"
diff --git a/src/atipciids.h b/src/atipciids.h
index 5f66aa0..04b5960 100644
--- a/src/atipciids.h
+++ b/src/atipciids.h
@@ -44,6 +44,7 @@
#ifndef PCI_VENDOR_HP
#define PCI_VENDOR_HP 0x103c
#endif
+#define PCI_VENDOR_SONY 0x104D
#include "ati_pciids_gen.h"
diff --git a/src/radeon_bios.c b/src/radeon_bios.c
index b53a0ed..5f12534 100644
--- a/src/radeon_bios.c
+++ b/src/radeon_bios.c
@@ -34,7 +34,7 @@
#include "xf86.h"
#include "xf86_OSproc.h"
-#include "xf86PciInfo.h"
+#include "atipciids.h"
#include "radeon.h"
#include "radeon_reg.h"
#include "radeon_macros.h"
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 07f127c..f1ae65e 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -54,7 +54,6 @@
/* X and server generic header files */
#include "xf86.h"
-#include "xf86PciInfo.h"
#include "windowstr.h"
/* GLX/DRI/DRM definitions */
commit 70da7001e81363ed6ef2c4727c512daf53ae29fe
Author: Jeremy Huddleston <jerem...@apple.com>
Date: Sat Oct 29 20:15:09 2011 -0700
Use malloc/calloc/realloc/free directly
Signed-off-by: Jeremy Huddleston <jerem...@apple.com>
diff --git a/src/theatre.c b/src/theatre.c
index ad055c5..fc68f27 100644
--- a/src/theatre.c
+++ b/src/theatre.c
@@ -46,7 +46,7 @@ TheatrePtr DetectTheatre(GENERIC_BUS_Ptr b)
return NULL;
}
- t = xcalloc(1,sizeof(TheatreRec));
+ t = calloc(1,sizeof(TheatreRec));
t->VIP = b;
t->theatre_num = -1;
t->mode=MODE_UNINITIALIZED;
@@ -81,7 +81,7 @@ TheatrePtr DetectTheatre(GENERIC_BUS_Ptr b)
if(t->theatre_num < 0)
{
- xfree(t);
+ free(t);
return NULL;
}
commit a3bb07efb1757c33d70e2e1928219d12a4dd6498
Author: Michel Dänzer <michel.daen...@amd.com>
Date: Tue Oct 25 17:43:58 2011 +0200
EXA >= R6xx / KMS: Avoid running out of CS space at inconvenient times.
Otherwise we may end up with things not properly set up at the beginning of
the
next CS.
Fixes http://bugs.debian.org/645007 .
In contrast to the Composite code for < R6xx, this isn't necessary with UMS,
as the draw packet only uses constant space in the indirect buffer, and
nothing
else can mess with the 3D state between indirect buffers.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
diff --git a/src/evergreen_exa.c b/src/evergreen_exa.c
index 306e90f..6becbb3 100644
--- a/src/evergreen_exa.c
+++ b/src/evergreen_exa.c
@@ -55,9 +55,6 @@ extern int cayman_xv_ps(RADEONChipFamily ChipSet, uint32_t*
shader);
extern int cayman_comp_vs(RADEONChipFamily ChipSet, uint32_t* vs);
extern int cayman_comp_ps(RADEONChipFamily ChipSet, uint32_t* ps);
-static void
-EVERGREENDoneSolid(PixmapPtr pPix);
-
static Bool
EVERGREENPrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
{
@@ -205,9 +202,27 @@ EVERGREENPrepareSolid(PixmapPtr pPix, int alu, Pixel pm,
Pixel fg)
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->dst_pix = pPix;
+ accel_state->fg = fg;
+
return TRUE;
}
+static void
+EVERGREENDoneSolid(PixmapPtr pPix)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pPix->drawable.pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ struct radeon_accel_state *accel_state = info->accel_state;
+
+ if (accel_state->vsync)
+ evergreen_cp_wait_vline_sync(pScrn, pPix,
+ accel_state->vline_crtc,
+ accel_state->vline_y1,
+ accel_state->vline_y2);
+
+ evergreen_finish_op(pScrn, 8);
+}
static void
EVERGREENSolid(PixmapPtr pPix, int x1, int y1, int x2, int y2)
@@ -217,6 +232,15 @@ EVERGREENSolid(PixmapPtr pPix, int x1, int y1, int x2, int
y2)
struct radeon_accel_state *accel_state = info->accel_state;
float *vb;
+ if (CS_FULL(info->cs)) {
+ EVERGREENDoneSolid(info->accel_state->dst_pix);
+ radeon_cs_flush_indirect(pScrn);
+ EVERGREENPrepareSolid(accel_state->dst_pix,
+ accel_state->rop,
+ accel_state->planemask,
+ accel_state->fg);
+ }
+
if (accel_state->vsync)
RADEONVlineHelperSet(pScrn, x1, y1, x2, y2);
@@ -235,22 +259,6 @@ EVERGREENSolid(PixmapPtr pPix, int x1, int y1, int x2, int
y2)
}
static void
-EVERGREENDoneSolid(PixmapPtr pPix)
-{
- ScrnInfoPtr pScrn = xf86Screens[pPix->drawable.pScreen->myNum];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
-
- if (accel_state->vsync)
- evergreen_cp_wait_vline_sync(pScrn, pPix,
- accel_state->vline_crtc,
- accel_state->vline_y1,
- accel_state->vline_y2);
-
- evergreen_finish_op(pScrn, 8);
-}
-
-static void
EVERGREENDoPrepareCopy(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -510,10 +518,30 @@ EVERGREENPrepareCopy(PixmapPtr pSrc, PixmapPtr pDst,
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->dst_pix = pDst;
+ accel_state->src_pix = pSrc;
+ accel_state->xdir = xdir;
+ accel_state->ydir = ydir;
+
return TRUE;
}
static void
+EVERGREENDoneCopy(PixmapPtr pDst)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ struct radeon_accel_state *accel_state = info->accel_state;
+
+ if (!accel_state->same_surface)
+ EVERGREENDoCopyVline(pDst);
+
+ if (accel_state->copy_area)
+ accel_state->copy_area = NULL;
+
+}
+
+static void
EVERGREENCopy(PixmapPtr pDst,
int srcX, int srcY,
int dstX, int dstY,
@@ -526,6 +554,17 @@ EVERGREENCopy(PixmapPtr pDst,
if (accel_state->same_surface && (srcX == dstX) && (srcY == dstY))
return;
+ if (CS_FULL(info->cs)) {
+ EVERGREENDoneCopy(info->accel_state->dst_pix);
+ radeon_cs_flush_indirect(pScrn);
+ EVERGREENPrepareCopy(accel_state->src_pix,
+ accel_state->dst_pix,
+ accel_state->xdir,
+ accel_state->ydir,
+ accel_state->rop,
+ accel_state->planemask);
+ }
+
if (accel_state->vsync)
RADEONVlineHelperSet(pScrn, dstX, dstY, dstX + w, dstY + h);
@@ -568,21 +607,6 @@ EVERGREENCopy(PixmapPtr pDst,
}
-static void
-EVERGREENDoneCopy(PixmapPtr pDst)
-{
- ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
-
- if (!accel_state->same_surface)
- EVERGREENDoCopyVline(pDst);
-
- if (accel_state->copy_area)
- accel_state->copy_area = NULL;
-
-}
-
struct blendinfo {
Bool dst_alpha;
Bool src_alpha;
@@ -1306,9 +1330,34 @@ static Bool EVERGREENPrepareComposite(int op, PicturePtr
pSrcPicture,
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->composite_op = op;
+ accel_state->dst_pic = pDstPicture;
+ accel_state->src_pic = pSrcPicture;
+ accel_state->dst_pix = pDst;
+ accel_state->msk_pix = pMask;
+ accel_state->src_pix = pSrc;
+
return TRUE;
}
+static void EVERGREENDoneComposite(PixmapPtr pDst)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ struct radeon_accel_state *accel_state = info->accel_state;
+ int vtx_size;
+
+ if (accel_state->vsync)
+ evergreen_cp_wait_vline_sync(pScrn, pDst,
+ accel_state->vline_crtc,
+ accel_state->vline_y1,
+ accel_state->vline_y2);
+
+ vtx_size = accel_state->msk_pic ? 24 : 16;
+
+ evergreen_finish_op(pScrn, vtx_size);
+}
+
static void EVERGREENComposite(PixmapPtr pDst,
int srcX, int srcY,
int maskX, int maskY,
@@ -1320,6 +1369,18 @@ static void EVERGREENComposite(PixmapPtr pDst,
struct radeon_accel_state *accel_state = info->accel_state;
float *vb;
+ if (CS_FULL(info->cs)) {
+ EVERGREENDoneComposite(info->accel_state->dst_pix);
+ radeon_cs_flush_indirect(pScrn);
+ EVERGREENPrepareComposite(info->accel_state->composite_op,
+ info->accel_state->src_pic,
+ info->accel_state->msk_pic,
+ info->accel_state->dst_pic,
+ info->accel_state->src_pix,
+ info->accel_state->msk_pix,
+ info->accel_state->dst_pix);
+ }
+
if (accel_state->vsync)
RADEONVlineHelperSet(pScrn, dstX, dstY, dstX + w, dstY + h);
@@ -1375,24 +1436,6 @@ static void EVERGREENComposite(PixmapPtr pDst,
}
-static void EVERGREENDoneComposite(PixmapPtr pDst)
-{
- ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
- int vtx_size;
-
- if (accel_state->vsync)
- evergreen_cp_wait_vline_sync(pScrn, pDst,
- accel_state->vline_crtc,
- accel_state->vline_y1,
- accel_state->vline_y2);
-
- vtx_size = accel_state->msk_pic ? 24 : 16;
-
- evergreen_finish_op(pScrn, vtx_size);
-}
-
static Bool
EVERGREENUploadToScreen(PixmapPtr pDst, int x, int y, int w, int h,
char *src, int src_pitch)
diff --git a/src/r600_exa.c b/src/r600_exa.c
index 2673599..71e1393 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -132,6 +132,11 @@ R600SetAccelState(ScrnInfoPtr pScrn,
accel_state->dst_size = 0;
}
+#ifdef XF86DRM_MODE
+ if (info->cs && CS_FULL(info->cs))
+ radeon_cs_flush_indirect(pScrn);
+#endif
+
accel_state->rop = rop;
accel_state->planemask = planemask;
@@ -170,9 +175,6 @@ R600SetAccelState(ScrnInfoPtr pScrn,
return TRUE;
}
-static void
-R600DoneSolid(PixmapPtr pPix);
-
static Bool
R600PrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
{
@@ -318,9 +320,27 @@ R600PrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel
fg)
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->dst_pix = pPix;
+ accel_state->fg = fg;
+
return TRUE;
}
+static void
+R600DoneSolid(PixmapPtr pPix)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pPix->drawable.pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ struct radeon_accel_state *accel_state = info->accel_state;
+
+ if (accel_state->vsync)
+ r600_cp_wait_vline_sync(pScrn, accel_state->ib, pPix,
+ accel_state->vline_crtc,
+ accel_state->vline_y1,
+ accel_state->vline_y2);
+
+ r600_finish_op(pScrn, 8);
+}
static void
R600Solid(PixmapPtr pPix, int x1, int y1, int x2, int y2)
@@ -330,6 +350,17 @@ R600Solid(PixmapPtr pPix, int x1, int y1, int x2, int y2)
struct radeon_accel_state *accel_state = info->accel_state;
float *vb;
+#ifdef XF86DRM_MODE
+ if (info->cs && CS_FULL(info->cs)) {
+ R600DoneSolid(info->accel_state->dst_pix);
+ radeon_cs_flush_indirect(pScrn);
+ R600PrepareSolid(accel_state->dst_pix,
+ accel_state->rop,
+ accel_state->planemask,
+ accel_state->fg);
+ }
+#endif
+
if (accel_state->vsync)
RADEONVlineHelperSet(pScrn, x1, y1, x2, y2);
@@ -348,22 +379,6 @@ R600Solid(PixmapPtr pPix, int x1, int y1, int x2, int y2)
}
static void
-R600DoneSolid(PixmapPtr pPix)
-{
- ScrnInfoPtr pScrn = xf86Screens[pPix->drawable.pScreen->myNum];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
-
- if (accel_state->vsync)
- r600_cp_wait_vline_sync(pScrn, accel_state->ib, pPix,
- accel_state->vline_crtc,
- accel_state->vline_y1,
- accel_state->vline_y2);
-
- r600_finish_op(pScrn, 8);
-}
-
-static void
R600DoPrepareCopy(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -653,10 +668,33 @@ R600PrepareCopy(PixmapPtr pSrc, PixmapPtr pDst,
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->dst_pix = pDst;
+ accel_state->src_pix = pSrc;
+ accel_state->xdir = xdir;
--
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