configure.ac | 2
man/radeon.man | 59 ++++++-------
src/Makefile.am | 2
src/ati.c | 1
src/ati.h | 1
src/ati_pciids_gen.h | 13 ++
src/atipciids.h | 1
src/atombios_output.c | 9 ++
src/cayman_reg.h | 31 +++----
src/drmmode_display.c | 52 +++++++----
src/drmmode_display.h | 10 +-
src/evergreen_accel.c | 53 +++++++++++-
src/evergreen_exa.c | 147 +++++++++++++++++++++------------
src/evergreen_reg.h | 32 +++----
src/pcidb/ati_pciids.csv | 13 ++
src/r600_exa.c | 164 ++++++++++++++++++++++++-------------
src/r600_reg.h | 35 +++-----
src/r6xx_accel.c | 4
src/radeon.h | 67 ---------------
src/radeon_bios.c | 2
src/radeon_chipinfo_gen.h | 13 ++
src/radeon_chipset_gen.h | 13 ++
src/radeon_commonfuncs.c | 6 +
src/radeon_dri.c | 30 +++++-
src/radeon_dri2.c | 166 ++++++++++++++++++++++++++++----------
src/radeon_driver.c | 14 ++-
src/radeon_exa_funcs.c | 18 ++--
src/radeon_kms.c | 36 ++++++--
src/radeon_pci_chipset_gen.h | 13 ++
src/radeon_pci_device_match_gen.h | 13 ++
src/radeon_probe.c | 29 ++++++
src/radeon_probe.h | 66 +++++++++++++++
src/radeon_textured_video.c | 2
src/radeon_video.c | 26 +++++
src/radeon_video.h | 5 +
src/radeon_xvmc.c | 144 ++++++++++++++++++++++++++++++++
src/theatre.c | 4
37 files changed, 942 insertions(+), 354 deletions(-)
New commits:
commit 93459f842c2d8dc178a1954b8e05150fcb96ac9a
Author: Michel Dänzer <michel.daen...@amd.com>
Date: Wed Nov 2 12:51:15 2011 +0100
Bump version for 6.14.3 release.
diff --git a/configure.ac b/configure.ac
index ec54478..167432c 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ([2.60])
AC_INIT([xf86-video-ati],
- [6.14.99],
+ [6.14.3],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
[xf86-video-ati])
commit fe3ce559b7f07d39ded39abb38576846d6eb185b
Author: Jeremy Huddleston <jerem...@apple.com>
Date: Tue Nov 1 20:27:03 2011 -0700
Build fix for -Werror=int-to-pointer-cast
Signed-off-by: Jeremy Huddleston <jerem...@apple.com>
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index f1ae65e..81dc08b 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -1581,7 +1581,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo->ddxDriverMajorVersion = info->allowColorTiling ? 5 : 4;
pDRIInfo->ddxDriverMinorVersion = 3;
pDRIInfo->ddxDriverPatchVersion = 0;
- pDRIInfo->frameBufferPhysicalAddress = (void *)info->LinearAddr +
info->dri->frontOffset;
+ pDRIInfo->frameBufferPhysicalAddress = (void *)(uintptr_t)info->LinearAddr
+ info->dri->frontOffset;
pDRIInfo->frameBufferSize = info->FbMapSize -
info->FbSecureSize;
pDRIInfo->frameBufferStride = (pScrn->displayWidth *
info->CurrentLayout.pixel_bytes);
commit d3d6a5da07aaec5961e51c9a8f90c1490ee101b6
Author: Tormod Volden <debian.tor...@gmail.com>
Date: Sat Oct 29 23:08:46 2011 +0200
radeon: do not include xf86PciInfo.h
We already use atipciids.h instead most places.
Signed-off-by: Tormod Volden <debian.tor...@gmail.com>
diff --git a/src/ati.c b/src/ati.c
index ea71e88..e1c136f 100644
--- a/src/ati.c
+++ b/src/ati.c
@@ -63,6 +63,7 @@
#include "atipcirename.h"
#include "ati.h"
+#include "atipciids.h"
#include "ativersion.h"
/* names duplicated from version headers */
diff --git a/src/ati.h b/src/ati.h
index 86c40a1..b7120d9 100644
--- a/src/ati.h
+++ b/src/ati.h
@@ -26,7 +26,6 @@
#include <unistd.h>
#include <stdint.h>
#include "xf86Pci.h"
-#include "xf86PciInfo.h"
#include "xf86.h"
diff --git a/src/atipciids.h b/src/atipciids.h
index 5f66aa0..04b5960 100644
--- a/src/atipciids.h
+++ b/src/atipciids.h
@@ -44,6 +44,7 @@
#ifndef PCI_VENDOR_HP
#define PCI_VENDOR_HP 0x103c
#endif
+#define PCI_VENDOR_SONY 0x104D
#include "ati_pciids_gen.h"
diff --git a/src/radeon_bios.c b/src/radeon_bios.c
index b53a0ed..5f12534 100644
--- a/src/radeon_bios.c
+++ b/src/radeon_bios.c
@@ -34,7 +34,7 @@
#include "xf86.h"
#include "xf86_OSproc.h"
-#include "xf86PciInfo.h"
+#include "atipciids.h"
#include "radeon.h"
#include "radeon_reg.h"
#include "radeon_macros.h"
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 07f127c..f1ae65e 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -54,7 +54,6 @@
/* X and server generic header files */
#include "xf86.h"
-#include "xf86PciInfo.h"
#include "windowstr.h"
/* GLX/DRI/DRM definitions */
commit 70da7001e81363ed6ef2c4727c512daf53ae29fe
Author: Jeremy Huddleston <jerem...@apple.com>
Date: Sat Oct 29 20:15:09 2011 -0700
Use malloc/calloc/realloc/free directly
Signed-off-by: Jeremy Huddleston <jerem...@apple.com>
diff --git a/src/theatre.c b/src/theatre.c
index ad055c5..fc68f27 100644
--- a/src/theatre.c
+++ b/src/theatre.c
@@ -46,7 +46,7 @@ TheatrePtr DetectTheatre(GENERIC_BUS_Ptr b)
return NULL;
}
- t = xcalloc(1,sizeof(TheatreRec));
+ t = calloc(1,sizeof(TheatreRec));
t->VIP = b;
t->theatre_num = -1;
t->mode=MODE_UNINITIALIZED;
@@ -81,7 +81,7 @@ TheatrePtr DetectTheatre(GENERIC_BUS_Ptr b)
if(t->theatre_num < 0)
{
- xfree(t);
+ free(t);
return NULL;
}
commit a3bb07efb1757c33d70e2e1928219d12a4dd6498
Author: Michel Dänzer <michel.daen...@amd.com>
Date: Tue Oct 25 17:43:58 2011 +0200
EXA >= R6xx / KMS: Avoid running out of CS space at inconvenient times.
Otherwise we may end up with things not properly set up at the beginning of
the
next CS.
Fixes http://bugs.debian.org/645007 .
In contrast to the Composite code for < R6xx, this isn't necessary with UMS,
as the draw packet only uses constant space in the indirect buffer, and
nothing
else can mess with the 3D state between indirect buffers.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
diff --git a/src/evergreen_exa.c b/src/evergreen_exa.c
index 306e90f..6becbb3 100644
--- a/src/evergreen_exa.c
+++ b/src/evergreen_exa.c
@@ -55,9 +55,6 @@ extern int cayman_xv_ps(RADEONChipFamily ChipSet, uint32_t*
shader);
extern int cayman_comp_vs(RADEONChipFamily ChipSet, uint32_t* vs);
extern int cayman_comp_ps(RADEONChipFamily ChipSet, uint32_t* ps);
-static void
-EVERGREENDoneSolid(PixmapPtr pPix);
-
static Bool
EVERGREENPrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
{
@@ -205,9 +202,27 @@ EVERGREENPrepareSolid(PixmapPtr pPix, int alu, Pixel pm,
Pixel fg)
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->dst_pix = pPix;
+ accel_state->fg = fg;
+
return TRUE;
}
+static void
+EVERGREENDoneSolid(PixmapPtr pPix)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pPix->drawable.pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ struct radeon_accel_state *accel_state = info->accel_state;
+
+ if (accel_state->vsync)
+ evergreen_cp_wait_vline_sync(pScrn, pPix,
+ accel_state->vline_crtc,
+ accel_state->vline_y1,
+ accel_state->vline_y2);
+
+ evergreen_finish_op(pScrn, 8);
+}
static void
EVERGREENSolid(PixmapPtr pPix, int x1, int y1, int x2, int y2)
@@ -217,6 +232,15 @@ EVERGREENSolid(PixmapPtr pPix, int x1, int y1, int x2, int
y2)
struct radeon_accel_state *accel_state = info->accel_state;
float *vb;
+ if (CS_FULL(info->cs)) {
+ EVERGREENDoneSolid(info->accel_state->dst_pix);
+ radeon_cs_flush_indirect(pScrn);
+ EVERGREENPrepareSolid(accel_state->dst_pix,
+ accel_state->rop,
+ accel_state->planemask,
+ accel_state->fg);
+ }
+
if (accel_state->vsync)
RADEONVlineHelperSet(pScrn, x1, y1, x2, y2);
@@ -235,22 +259,6 @@ EVERGREENSolid(PixmapPtr pPix, int x1, int y1, int x2, int
y2)
}
static void
-EVERGREENDoneSolid(PixmapPtr pPix)
-{
- ScrnInfoPtr pScrn = xf86Screens[pPix->drawable.pScreen->myNum];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
-
- if (accel_state->vsync)
- evergreen_cp_wait_vline_sync(pScrn, pPix,
- accel_state->vline_crtc,
- accel_state->vline_y1,
- accel_state->vline_y2);
-
- evergreen_finish_op(pScrn, 8);
-}
-
-static void
EVERGREENDoPrepareCopy(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -510,10 +518,30 @@ EVERGREENPrepareCopy(PixmapPtr pSrc, PixmapPtr pDst,
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->dst_pix = pDst;
+ accel_state->src_pix = pSrc;
+ accel_state->xdir = xdir;
+ accel_state->ydir = ydir;
+
return TRUE;
}
static void
+EVERGREENDoneCopy(PixmapPtr pDst)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ struct radeon_accel_state *accel_state = info->accel_state;
+
+ if (!accel_state->same_surface)
+ EVERGREENDoCopyVline(pDst);
+
+ if (accel_state->copy_area)
+ accel_state->copy_area = NULL;
+
+}
+
+static void
EVERGREENCopy(PixmapPtr pDst,
int srcX, int srcY,
int dstX, int dstY,
@@ -526,6 +554,17 @@ EVERGREENCopy(PixmapPtr pDst,
if (accel_state->same_surface && (srcX == dstX) && (srcY == dstY))
return;
+ if (CS_FULL(info->cs)) {
+ EVERGREENDoneCopy(info->accel_state->dst_pix);
+ radeon_cs_flush_indirect(pScrn);
+ EVERGREENPrepareCopy(accel_state->src_pix,
+ accel_state->dst_pix,
+ accel_state->xdir,
+ accel_state->ydir,
+ accel_state->rop,
+ accel_state->planemask);
+ }
+
if (accel_state->vsync)
RADEONVlineHelperSet(pScrn, dstX, dstY, dstX + w, dstY + h);
@@ -568,21 +607,6 @@ EVERGREENCopy(PixmapPtr pDst,
}
-static void
-EVERGREENDoneCopy(PixmapPtr pDst)
-{
- ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
-
- if (!accel_state->same_surface)
- EVERGREENDoCopyVline(pDst);
-
- if (accel_state->copy_area)
- accel_state->copy_area = NULL;
-
-}
-
struct blendinfo {
Bool dst_alpha;
Bool src_alpha;
@@ -1306,9 +1330,34 @@ static Bool EVERGREENPrepareComposite(int op, PicturePtr
pSrcPicture,
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->composite_op = op;
+ accel_state->dst_pic = pDstPicture;
+ accel_state->src_pic = pSrcPicture;
+ accel_state->dst_pix = pDst;
+ accel_state->msk_pix = pMask;
+ accel_state->src_pix = pSrc;
+
return TRUE;
}
+static void EVERGREENDoneComposite(PixmapPtr pDst)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ struct radeon_accel_state *accel_state = info->accel_state;
+ int vtx_size;
+
+ if (accel_state->vsync)
+ evergreen_cp_wait_vline_sync(pScrn, pDst,
+ accel_state->vline_crtc,
+ accel_state->vline_y1,
+ accel_state->vline_y2);
+
+ vtx_size = accel_state->msk_pic ? 24 : 16;
+
+ evergreen_finish_op(pScrn, vtx_size);
+}
+
static void EVERGREENComposite(PixmapPtr pDst,
int srcX, int srcY,
int maskX, int maskY,
@@ -1320,6 +1369,18 @@ static void EVERGREENComposite(PixmapPtr pDst,
struct radeon_accel_state *accel_state = info->accel_state;
float *vb;
+ if (CS_FULL(info->cs)) {
+ EVERGREENDoneComposite(info->accel_state->dst_pix);
+ radeon_cs_flush_indirect(pScrn);
+ EVERGREENPrepareComposite(info->accel_state->composite_op,
+ info->accel_state->src_pic,
+ info->accel_state->msk_pic,
+ info->accel_state->dst_pic,
+ info->accel_state->src_pix,
+ info->accel_state->msk_pix,
+ info->accel_state->dst_pix);
+ }
+
if (accel_state->vsync)
RADEONVlineHelperSet(pScrn, dstX, dstY, dstX + w, dstY + h);
@@ -1375,24 +1436,6 @@ static void EVERGREENComposite(PixmapPtr pDst,
}
-static void EVERGREENDoneComposite(PixmapPtr pDst)
-{
- ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
- int vtx_size;
-
- if (accel_state->vsync)
- evergreen_cp_wait_vline_sync(pScrn, pDst,
- accel_state->vline_crtc,
- accel_state->vline_y1,
- accel_state->vline_y2);
-
- vtx_size = accel_state->msk_pic ? 24 : 16;
-
- evergreen_finish_op(pScrn, vtx_size);
-}
-
static Bool
EVERGREENUploadToScreen(PixmapPtr pDst, int x, int y, int w, int h,
char *src, int src_pitch)
diff --git a/src/r600_exa.c b/src/r600_exa.c
index 2673599..71e1393 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -132,6 +132,11 @@ R600SetAccelState(ScrnInfoPtr pScrn,
accel_state->dst_size = 0;
}
+#ifdef XF86DRM_MODE
+ if (info->cs && CS_FULL(info->cs))
+ radeon_cs_flush_indirect(pScrn);
+#endif
+
accel_state->rop = rop;
accel_state->planemask = planemask;
@@ -170,9 +175,6 @@ R600SetAccelState(ScrnInfoPtr pScrn,
return TRUE;
}
-static void
-R600DoneSolid(PixmapPtr pPix);
-
static Bool
R600PrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
{
@@ -318,9 +320,27 @@ R600PrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel
fg)
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->dst_pix = pPix;
+ accel_state->fg = fg;
+
return TRUE;
}
+static void
+R600DoneSolid(PixmapPtr pPix)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pPix->drawable.pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ struct radeon_accel_state *accel_state = info->accel_state;
+
+ if (accel_state->vsync)
+ r600_cp_wait_vline_sync(pScrn, accel_state->ib, pPix,
+ accel_state->vline_crtc,
+ accel_state->vline_y1,
+ accel_state->vline_y2);
+
+ r600_finish_op(pScrn, 8);
+}
static void
R600Solid(PixmapPtr pPix, int x1, int y1, int x2, int y2)
@@ -330,6 +350,17 @@ R600Solid(PixmapPtr pPix, int x1, int y1, int x2, int y2)
struct radeon_accel_state *accel_state = info->accel_state;
float *vb;
+#ifdef XF86DRM_MODE
+ if (info->cs && CS_FULL(info->cs)) {
+ R600DoneSolid(info->accel_state->dst_pix);
+ radeon_cs_flush_indirect(pScrn);
+ R600PrepareSolid(accel_state->dst_pix,
+ accel_state->rop,
+ accel_state->planemask,
+ accel_state->fg);
+ }
+#endif
+
if (accel_state->vsync)
RADEONVlineHelperSet(pScrn, x1, y1, x2, y2);
@@ -348,22 +379,6 @@ R600Solid(PixmapPtr pPix, int x1, int y1, int x2, int y2)
}
static void
-R600DoneSolid(PixmapPtr pPix)
-{
- ScrnInfoPtr pScrn = xf86Screens[pPix->drawable.pScreen->myNum];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
-
- if (accel_state->vsync)
- r600_cp_wait_vline_sync(pScrn, accel_state->ib, pPix,
- accel_state->vline_crtc,
- accel_state->vline_y1,
- accel_state->vline_y2);
-
- r600_finish_op(pScrn, 8);
-}
-
-static void
R600DoPrepareCopy(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -653,10 +668,33 @@ R600PrepareCopy(PixmapPtr pSrc, PixmapPtr pDst,
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->dst_pix = pDst;
+ accel_state->src_pix = pSrc;
+ accel_state->xdir = xdir;
+ accel_state->ydir = ydir;
+
return TRUE;
}
static void
+R600DoneCopy(PixmapPtr pDst)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ struct radeon_accel_state *accel_state = info->accel_state;
+
+ if (!accel_state->same_surface)
+ R600DoCopyVline(pDst);
+
+ if (accel_state->copy_area) {
+ if (!info->cs)
+ exaOffscreenFree(pDst->drawable.pScreen, accel_state->copy_area);
+ accel_state->copy_area = NULL;
+ }
+
+}
+
+static void
R600Copy(PixmapPtr pDst,
int srcX, int srcY,
int dstX, int dstY,
@@ -669,6 +707,19 @@ R600Copy(PixmapPtr pDst,
if (accel_state->same_surface && (srcX == dstX) && (srcY == dstY))
return;
+#ifdef XF86DRM_MODE
+ if (info->cs && CS_FULL(info->cs)) {
+ R600DoneCopy(info->accel_state->dst_pix);
+ radeon_cs_flush_indirect(pScrn);
+ R600PrepareCopy(accel_state->src_pix,
+ accel_state->dst_pix,
+ accel_state->xdir,
+ accel_state->ydir,
+ accel_state->rop,
+ accel_state->planemask);
+ }
+#endif
+
if (accel_state->vsync)
RADEONVlineHelperSet(pScrn, dstX, dstY, dstX + w, dstY + h);
@@ -723,24 +774,6 @@ R600Copy(PixmapPtr pDst,
}
-static void
-R600DoneCopy(PixmapPtr pDst)
-{
- ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
-
- if (!accel_state->same_surface)
- R600DoCopyVline(pDst);
-
- if (accel_state->copy_area) {
- if (!info->cs)
- exaOffscreenFree(pDst->drawable.pScreen, accel_state->copy_area);
- accel_state->copy_area = NULL;
- }
-
-}
-
struct blendinfo {
Bool dst_alpha;
Bool src_alpha;
@@ -1452,9 +1485,34 @@ static Bool R600PrepareComposite(int op, PicturePtr
pSrcPicture,
if (accel_state->vsync)
RADEONVlineHelperClear(pScrn);
+ accel_state->composite_op = op;
+ accel_state->dst_pic = pDstPicture;
+ accel_state->src_pic = pSrcPicture;
+ accel_state->dst_pix = pDst;
+ accel_state->msk_pix = pMask;
+ accel_state->src_pix = pSrc;
+
return TRUE;
}
+static void R600DoneComposite(PixmapPtr pDst)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ struct radeon_accel_state *accel_state = info->accel_state;
+ int vtx_size;
+
+ if (accel_state->vsync)
+ r600_cp_wait_vline_sync(pScrn, accel_state->ib, pDst,
+ accel_state->vline_crtc,
+ accel_state->vline_y1,
+ accel_state->vline_y2);
+
+ vtx_size = accel_state->msk_pic ? 24 : 16;
+
+ r600_finish_op(pScrn, vtx_size);
+}
+
static void R600Composite(PixmapPtr pDst,
int srcX, int srcY,
int maskX, int maskY,
@@ -1469,6 +1527,20 @@ static void R600Composite(PixmapPtr pDst,
/* ErrorF("R600Composite (%d,%d) (%d,%d) (%d,%d) (%d,%d)\n",
srcX, srcY, maskX, maskY,dstX, dstY, w, h); */
+#ifdef XF86DRM_MODE
+ if (info->cs && CS_FULL(info->cs)) {
+ R600DoneComposite(info->accel_state->dst_pix);
+ radeon_cs_flush_indirect(pScrn);
+ R600PrepareComposite(info->accel_state->composite_op,
+ info->accel_state->src_pic,
+ info->accel_state->msk_pic,
+ info->accel_state->dst_pic,
+ info->accel_state->src_pix,
+ info->accel_state->msk_pix,
+ info->accel_state->dst_pix);
+ }
+#endif
+
if (accel_state->vsync)
RADEONVlineHelperSet(pScrn, dstX, dstY, dstX + w, dstY + h);
@@ -1524,24 +1596,6 @@ static void R600Composite(PixmapPtr pDst,
}
-static void R600DoneComposite(PixmapPtr pDst)
-{
- ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
- int vtx_size;
-
- if (accel_state->vsync)
- r600_cp_wait_vline_sync(pScrn, accel_state->ib, pDst,
- accel_state->vline_crtc,
- accel_state->vline_y1,
- accel_state->vline_y2);
-
- vtx_size = accel_state->msk_pic ? 24 : 16;
-
- r600_finish_op(pScrn, vtx_size);
-}
-
Bool
R600CopyToVRAM(ScrnInfoPtr pScrn,
char *src, int src_pitch,
diff --git a/src/radeon.h b/src/radeon.h
index 50ce62f..73d6db1 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -735,12 +735,13 @@ struct radeon_accel_state {
// UTS/DFS
drmBufPtr scratch;
- // copy
+ // solid/copy
ExaOffscreenArea *copy_area;
struct radeon_bo *copy_area_bo;
Bool same_surface;
int rop;
uint32_t planemask;
+ uint32_t fg;
// composite
Bool component_alpha;
commit 23788c4a5e3b6affb9b183e1393edd0e5ca4550e
Author: Michel Dänzer <michel.daen...@amd.com>
Date: Thu Oct 27 19:12:22 2011 +0200
EXA < R6xx: Make sure 2D state is re-emitted after running out of CS space.
Otherwise it's basically luck what the 2D state ends up being at the
beginning
of the next CS.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index 52adcea..058a547 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -132,14 +132,13 @@ static void FUNC_NAME(Emit2DState)(ScrnInfoPtr pScrn, int
op)
}
static void
-FUNC_NAME(RADEONDone2D)(PixmapPtr pPix)
+FUNC_NAME(RADEONFlush2D)(PixmapPtr pPix)
{
RINFO_FROM_SCREEN(pPix->drawable.pScreen);
ACCEL_PREAMBLE();
TRACE;
- info->state_2d.op = 0;
BEGIN_ACCEL(2);
OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
@@ -147,6 +146,15 @@ FUNC_NAME(RADEONDone2D)(PixmapPtr pPix)
FINISH_ACCEL();
}
+static void
+FUNC_NAME(RADEONDone2D)(PixmapPtr pPix)
+{
+ RINFO_FROM_SCREEN(pPix->drawable.pScreen);
+ info->state_2d.op = 0;
+
+ FUNC_NAME(RADEONFlush2D)(pPix);
+}
+
static Bool
FUNC_NAME(RADEONPrepareSolid)(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
{
@@ -220,7 +228,7 @@ FUNC_NAME(RADEONSolid)(PixmapPtr pPix, int x1, int y1, int
x2, int y2)
#if defined(ACCEL_CP) && defined(XF86DRM_MODE)
if (info->cs && CS_FULL(info->cs)) {
- FUNC_NAME(RADEONDone2D)(info->accel_state->dst_pix);
+ FUNC_NAME(RADEONFlush2D)(info->accel_state->dst_pix);
radeon_cs_flush_indirect(pScrn);
}
#endif
@@ -332,7 +340,7 @@ FUNC_NAME(RADEONCopy)(PixmapPtr pDst,
#if defined(ACCEL_CP) && defined(XF86DRM_MODE)
if (info->cs && CS_FULL(info->cs)) {
- FUNC_NAME(RADEONDone2D)(info->accel_state->dst_pix);
+ FUNC_NAME(RADEONFlush2D)(info->accel_state->dst_pix);
radeon_cs_flush_indirect(pScrn);
}
#endif
commit 6e0e1a821accc6ca95f4134e49b66a6b168c1934
Author: Michel Dänzer <michel.daen...@amd.com>
Date: Tue Oct 25 17:39:57 2011 +0200
Make radeon_dri2_create_buffer(s) more robust. (Bug #30047)
In particular, handle and propagate failure to allocate GPU accessible
memory,
instead of crashing. Fixes
https://bugs.freedesktop.org/show_bug.cgi?id=30047 .
Also take care not to leak resources in error paths.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
index 88117a5..8789d73 100644
--- a/src/radeon_dri2.c
+++ b/src/radeon_dri2.c
@@ -205,9 +205,17 @@ radeon_dri2_create_buffers(DrawablePtr drawable,
exaMoveInPixmap(pixmap);
info->exa_force_create = FALSE;
driver_priv = exaGetPixmapDriverPrivate(pixmap);
- r = radeon_gem_get_kernel_name(driver_priv->bo, &buffers[i].name);
- if (r)
- return r;
+ if (!driver_priv ||
+ radeon_gem_get_kernel_name(driver_priv->bo, &buffers[i].name) != 0)
{
+ int j;
+
+ for (j = 0; j < i; j++)
+ (*pScreen->DestroyPixmap)(privates[j].pixmap);
+ (*pScreen->DestroyPixmap)(pixmap);
+ free(privates);
+ free(buffers);
+ return NULL;
+ }
buffers[i].attachment = attachments[i];
buffers[i].pitch = pixmap->devKind;
@@ -232,7 +240,7 @@ radeon_dri2_create_buffer(DrawablePtr drawable,
struct dri2_buffer_priv *privates;
PixmapPtr pixmap, depth_pixmap;
struct radeon_exa_pixmap_priv *driver_priv;
- int r, need_enlarge = 0;
+ int need_enlarge = 0;
int flags;
unsigned front_width;
uint32_t tiling = 0;
@@ -240,17 +248,7 @@ radeon_dri2_create_buffer(DrawablePtr drawable,
pixmap = pScreen->GetScreenPixmap(pScreen);
front_width = pixmap->drawable.width;
- buffers = calloc(1, sizeof *buffers);
- if (buffers == NULL) {
- return NULL;
- }
- privates = calloc(1, sizeof(struct dri2_buffer_priv));
- if (privates == NULL) {
- free(buffers);
- return NULL;
- }
-
- depth_pixmap = NULL;
+ pixmap = depth_pixmap = NULL;
if (attachment == DRI2BufferFrontLeft) {
if (drawable->type == DRAWABLE_PIXMAP) {
@@ -351,6 +349,13 @@ radeon_dri2_create_buffer(DrawablePtr drawable,
}
}
+ if (!pixmap)
+ return NULL;
+
+ buffers = calloc(1, sizeof *buffers);
+ if (buffers == NULL)
+ goto error;
+
if (attachment == DRI2BufferDepth) {
depth_pixmap = pixmap;
}
@@ -358,9 +363,13 @@ radeon_dri2_create_buffer(DrawablePtr drawable,
exaMoveInPixmap(pixmap);
info->exa_force_create = FALSE;
driver_priv = exaGetPixmapDriverPrivate(pixmap);
- r = radeon_gem_get_kernel_name(driver_priv->bo, &buffers->name);
- if (r)
- return NULL;
+ if (!driver_priv ||
+ (radeon_gem_get_kernel_name(driver_priv->bo, &buffers->name) != 0))
+ goto error;
+
+ privates = calloc(1, sizeof(struct dri2_buffer_priv));
+ if (privates == NULL)
+ goto error;
buffers->attachment = attachment;
buffers->pitch = pixmap->devKind;
@@ -373,6 +382,12 @@ radeon_dri2_create_buffer(DrawablePtr drawable,
privates->refcnt = 1;
return buffers;
+
+error:
+ free(buffers);
+ if (pixmap)
+ (*pScreen->DestroyPixmap)(pixmap);
+ return NULL;
}
#endif
commit 856583dbca9319c77fed40daa9956e81a0068f9e
Author: Jerome Glisse <jgli...@redhat.com>
Date: Thu Oct 20 14:17:14 2011 -0400
radeon/kms: fallback to vesa if GPU is not supported by UMS
For GPU not supported by UMS, test in probe so that we properly
fallback to vesa.
Signed-off-by: Jerome Glisse <jgli...@redhat.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
diff --git a/src/radeon.h b/src/radeon.h
index f66ffd0..50ce62f 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -313,62 +313,6 @@ typedef struct {
DisplayModePtr mode;
} RADEONFBLayout;
-typedef enum {
- CHIP_FAMILY_UNKNOW,
- CHIP_FAMILY_LEGACY,
- CHIP_FAMILY_RADEON,
- CHIP_FAMILY_RV100,
- CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/
- CHIP_FAMILY_RV200,
- CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4
(IGP330/340/345/350), RS250 (IGP 7000) */
- CHIP_FAMILY_R200,
- CHIP_FAMILY_RV250,
- CHIP_FAMILY_RS300, /* RS300/RS350 */
- CHIP_FAMILY_RV280,
- CHIP_FAMILY_R300,
- CHIP_FAMILY_R350,
- CHIP_FAMILY_RV350,
- CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */
- CHIP_FAMILY_R420, /* R420/R423/M18 */
- CHIP_FAMILY_RV410, /* RV410, M26 */
- CHIP_FAMILY_RS400, /* xpress 200, 200m (RS400) Intel */
- CHIP_FAMILY_RS480, /* xpress 200, 200m (RS410/480/482/485) AMD */
- CHIP_FAMILY_RV515, /* rv515 */
- CHIP_FAMILY_R520, /* r520 */
- CHIP_FAMILY_RV530, /* rv530 */
- CHIP_FAMILY_R580, /* r580 */
- CHIP_FAMILY_RV560, /* rv560 */
- CHIP_FAMILY_RV570, /* rv570 */
- CHIP_FAMILY_RS600,
- CHIP_FAMILY_RS690,
- CHIP_FAMILY_RS740,
- CHIP_FAMILY_R600, /* r600 */
- CHIP_FAMILY_RV610,
- CHIP_FAMILY_RV630,
- CHIP_FAMILY_RV670,
- CHIP_FAMILY_RV620,
- CHIP_FAMILY_RV635,
- CHIP_FAMILY_RS780,
- CHIP_FAMILY_RS880,
- CHIP_FAMILY_RV770, /* r700 */
- CHIP_FAMILY_RV730,
- CHIP_FAMILY_RV710,
- CHIP_FAMILY_RV740,
- CHIP_FAMILY_CEDAR, /* evergreen */
- CHIP_FAMILY_REDWOOD,
- CHIP_FAMILY_JUNIPER,
- CHIP_FAMILY_CYPRESS,
- CHIP_FAMILY_HEMLOCK,
- CHIP_FAMILY_PALM,
- CHIP_FAMILY_SUMO,
- CHIP_FAMILY_SUMO2,
- CHIP_FAMILY_BARTS,
- CHIP_FAMILY_TURKS,
- CHIP_FAMILY_CAICOS,
- CHIP_FAMILY_CAYMAN,
- CHIP_FAMILY_LAST
-} RADEONChipFamily;
-
#define IS_RV100_VARIANT ((info->ChipFamily == CHIP_FAMILY_RV100) || \
(info->ChipFamily == CHIP_FAMILY_RV200) || \
(info->ChipFamily == CHIP_FAMILY_RS100) || \
@@ -501,16 +445,6 @@ struct radeon_exa_pixmap_priv {
Bool bo_mapped;
};
-typedef struct {
- uint32_t pci_device_id;
- RADEONChipFamily chip_family;
- int mobility;
- int igp;
- int nocrtc2;
- int nointtvout;
- int singledac;
-} RADEONCardInfo;
-
#define RADEON_2D_EXA_COPY 1
#define RADEON_2D_EXA_SOLID 2
diff --git a/src/radeon_probe.c b/src/radeon_probe.c
index 7819027..26dec28 100644
--- a/src/radeon_probe.c
+++ b/src/radeon_probe.c
@@ -59,9 +59,31 @@
#include "radeon_pci_chipset_gen.h"
+#include "radeon_chipinfo_gen.h"
#ifdef XSERVER_LIBPCIACCESS
#include "radeon_pci_device_match_gen.h"
+
+static Bool radeon_ums_supported(ScrnInfoPtr pScrn, struct pci_device *pci_dev)
+{
+ unsigned family = 0, i;
+
+ for (i = 0; i < sizeof(RADEONCards) / sizeof(RADEONCardInfo); i++) {
--
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