> --- Ursprüngliche Nachricht --- > Von: Benjamin Herrenschmidt <[EMAIL PROTECTED]> > An: Eugene Surovegin <[EMAIL PROTECTED]> > Kopie: Gerhard Pircher <[EMAIL PROTECTED]>, > [EMAIL PROTECTED], debian-powerpc@lists.debian.org > Betreff: Re: Not coherent cache DMA for G3/G4 CPUs: clarification needed > Datum: Fri, 21 Apr 2006 14:38:05 +1000 > > > In fact, I just grepped 2.6 and found > > #ifdef(CONFIG_NOT_COHERENT_CACHE) in syslib/mv64x60.c. Guess what > > systems usually have this type of bridge? Not 4xx/8xx, that's for sure. > > I think some folks tried ... and failed. That doesn't sound encouraging. ;)
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