In article <[EMAIL PROTECTED]> you wrote:
M> Well, I already did it, at bootup, it recognises the card, but
M> can't start X.
M> Might there be a problem?? Does the card need to be flashed to
M> work on ppc??
I've done it.
First, I have a Formac PCI video card that is S3 Virge with Fcode ROM
(so yes, special Mac ROM).
I don't know whether it would work without Mac ROM. Obviously the
firmware wouldn't initialize the card so you won't see neither OF nor
MacOS. Maybe Linux VGA textmode would work. There is no S3 virge
framebuffer driver in linux AFAIK, maybe the S3 framebuffer driver works
when you add the PCI ID-s.
Second, to run X, yoy need a modified virge driver in X. The stock virge
driver is little-endian only and additionally can't detect video RAM
size on PPC for some reason (maybe also because od endianness problems).
I have written a patch for the X virge driver that works for me but is
not enough clean and tested yet to submit to X. I have also the compiled
binary driver but the mac is currently without network (and broken in
other ways) so I can't reach it.
For reference and archival purposes, here is one snapshot of the patch:
Index: s3v_accel.c
===================================================================
RCS file: /cvs/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_accel.c,v
retrieving revision 1.23
diff -u -r1.23 s3v_accel.c
--- s3v_accel.c 2001/12/13 18:01:50 1.23
+++ s3v_accel.c 2003/01/31 22:39:53
@@ -128,7 +128,11 @@
infoPtr->Mono8x8PatternFillFlags = NO_TRANSPARENCY |
HARDWARE_PATTERN_PROGRAMMED_BITS |
HARDWARE_PATTERN_SCREEN_ORIGIN |
+#if X_BYTE_ORDER==X_BIG_ENDIAN
+ BIT_ORDER_IN_BYTE_LSBFIRST;
+#else
BIT_ORDER_IN_BYTE_MSBFIRST;
+#endif
#ifndef __alpha__
@@ -144,7 +148,11 @@
infoPtr->CPUToScreenColorExpandFillFlags = ROP_NEEDS_SOURCE |
CPU_TRANSFER_PAD_DWORD |
SCANLINE_PAD_DWORD |
+#if X_BYTE_ORDER==X_BIG_ENDIAN
+ BIT_ORDER_IN_BYTE_LSBFIRST |
+#else
BIT_ORDER_IN_BYTE_MSBFIRST |
+#endif
LEFT_EDGE_CLIPPING;
if(ps3v->AccelFlags & MONO_TRANS_BUG)
Index: s3v_driver.c
===================================================================
RCS file: /cvs/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c,v
retrieving revision 1.85
diff -u -r1.85 s3v_driver.c
--- s3v_driver.c 2003/01/12 03:55:48 1.85
+++ s3v_driver.c 2003/01/31 22:40:06
@@ -1127,6 +1127,7 @@
break;
}
}
+ ps3v->videoRamKbytes = 2 * 1024; // XXX hardcode
/* And save a byte value also */
ps3v->videoRambytes = ps3v->videoRamKbytes * 1024;
/* Make sure the screen also */
@@ -2395,10 +2396,17 @@
"Internal error: could not map registers.\n");
return FALSE;
}
+
+ pScrn->memPhysBase = ps3v->PciInfo->memBase[0];
+
+#if X_BYTE_ORDER==X_BIG_ENDIAN
+ pScrn->memPhysBase += 32*1024*1024; /* bigendian aperture is at 32M */
+#endif
+
/* Map the framebuffer */
if (ps3v->videoRambytes) { /* not set in PreInit() */
ps3v->FBBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
- ps3v->PciTag, ps3v->PciInfo->memBase[0],
+ ps3v->PciTag, pScrn->memPhysBase,
ps3v->videoRambytes );
if( !ps3v->FBBase ) {
@@ -2411,7 +2419,6 @@
ps3v->FBStart = ps3v->FBBase;
}
- pScrn->memPhysBase = ps3v->PciInfo->memBase[0];
pScrn->fbOffset = 0;
/* Set up offset to hwcursor memory area */
@@ -2884,6 +2891,10 @@
new->CR31 = 0x8c; /* Dis. 64k window, en. ENH maps */
}
+#if X_BYTE_ORDER==X_BIG_ENDIAN
+ new->CR53 |= 0x2; /* 2 - word swap */
+#endif
+
/* Enables S3D graphic engine and PCI disconnects */
if(ps3v->Chipset == S3_ViRGE_VX){
new->CR66 = 0x90;
@@ -2958,7 +2969,12 @@
new->CR45 = 0x00;
/* Enable MMIO to RAMDAC registers */
new->CR65 = 0x00; /* CR65_2 must be zero, doc seems to be wrong */
+
+#if X_BYTE_ORDER==X_BIG_ENDIAN
+ new->CR54 = 0x43; /* 0x20 is OK */
+#else
new->CR54 = 0x00;
+#endif
if ( S3_ViRGE_GX2_SERIES(ps3v->Chipset) ||
/* S3_ViRGE_MX_SERIES(ps3v->Chipset) || CR40 reserved on MX */
--
Meelis Roos
