Hello,
Le 06/12/2021 à 17:52, Thomas Bogendoerfer a écrit :
>>> MIPS do have a way to access count register from user space.
>>> Unfortunately there is no GCC intrinsic function for it, you may try
>>> following inline assembly.
>>>
>>> static inline unsigned long get_count() {
>>> unsigned long count;
>>> asm volatile ("rdhwr %[rt], $2" : [rt] "=d" (count));
>>> return count;
>>> }
>>>
>>> return Val_long (get_count());
>>
>> To be more precise - Not all CPUs have this (Older MIPS I for example
>> dont) but there is kernel emulation / instruction trapping for it.
>
> only for the thread register.
>
> what's the requirement for this cycle count ? Is it about more
> fine grained timestamps or really cpu cylces done ?
I've asked your question in
https://github.com/mirage/mirage-crypto/pull/148 and got a reply:
> The purpose is entropy harvesting - the lower 32 bit of mc_cycle_counter are
> mixed into the RNG (Fortuna). This is done in Lwt and MirageOS systems and
> called on each entry to the Lwt loop. The requirement is "a value that is
> hardly predictable and should be different in each call".
Cheers,
--
Stéphane
