On Fri, 20 Apr 2018, Michael Schmitz wrote: > > Looking at oktakon_io.S from the 2.16 series, it's using an exception > table similar to the Mac PDMA code (the main difference is that the Mac > PDMA has the transfer loop unrolled).
Yes, it seems so. > So it would appear the PDMA logic on the Oktagon board can raise a bus > fault to signal transfer errors. > I think the comments and transfer loops in oktagon_esp.c refute this interpretation. On Macs (at least) the PDMA bus fault is not a transfer error, it is a handshaking/pacing mechanism. I think that's an important distinction (especially after having tried and failed to get bus_error030() fixed). Recall that the scsi target always controls the transfer, not the initiator. Naturally scsi targets care not at all about processor bus timing, and naturally the processor cares not at all about ESP DMA signals. Hence the need for special handshaking logic. Bus faults would appear to be inevitable and normal occurrences during transfers. (Alternatively, the PDMA logic can buffer the transfer instead, which is the approach used by 53C400 chips. In this case bus errors never arise.) --
