Is this why haswell minidp sound is broken?
/**
* snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW
* @bus: HDA core bus
*
* Intel HSW/BDW display HDA controller is in GPU. Both its power and
link BCLK
* depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N
Value)
* are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
* BCLK = CDCLK * M / N
* The values will be lost when the display power well is disabled and
need to
* be restored to avoid abnormal playback speed.
https://review.coreboot.org/c/coreboot/+/50143 failed, now it's all
refactored, those regs are never set causing the windows driver to fail
to load.
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