On Tue, 16 Sep 2025 07:33:18 GMT, Thomas Schatzl <[email protected]> wrote:
> > @tschatzl : Hi, would you mind adding a small cleanup change for riscv? > > This also adds back the assertion about the registers. Still test good on > > linux-riscv64 platform. > > [riscv-addon.diff.txt](https://github.com/user-attachments/files/22356611/riscv-addon.diff.txt) > > This is the `end` -> `count` transformation in the barrier I suggested > earlier for RISC-V, isn't it? Thanks for contributing that, but would you > mind me holding off this until @theRealAph acks that similar change for > aarch64? It would be unfortunate imo if the implementations diverge too much. Yes, sure! The purpose is to minimize the difference to avoid possible issues in the future. ------------- PR Comment: https://git.openjdk.org/jdk/pull/23739#issuecomment-3296286316
