pkarashchenko commented on code in PR #10854:
URL: https://github.com/apache/nuttx/pull/10854#discussion_r1346279601
##########
arch/xtensa/src/esp32s3/esp32s3_ble_adapter.c:
##########
@@ -834,26 +892,32 @@ static void IRAM_ATTR task_yield_from_isr(void)
static void *semphr_create_wrapper(uint32_t max, uint32_t init)
{
int ret;
- sem_t *sem;
+ struct bt_sem_s *bt_sem;
int tmp;
- tmp = sizeof(sem_t);
- sem = kmm_malloc(tmp);
- if (!sem)
+ tmp = sizeof(struct bt_sem_s);
+ bt_sem = kmm_malloc(tmp);
+ DEBUGASSERT(bt_sem);
+ if (!bt_sem)
{
wlerr("ERROR: Failed to alloc %d memory\n", tmp);
return NULL;
}
- ret = nxsem_init(sem, 0, init);
+ ret = nxsem_init(&bt_sem->sem, 0, init);
+ DEBUGVERIFY(ret);
Review Comment:
```suggestion
DEBUGASSERT(ret == OK);
```
##########
arch/xtensa/src/esp32s3/esp32s3_irq.h:
##########
@@ -132,6 +134,126 @@ void esp32s3_teardown_irq(int cpu, int periphid, int
cpuint);
int esp32s3_getirq(int cpu, int cpuint);
+/****************************************************************************
+ * Name: esp32s3_getcpuint_from_irq
+ *
+ * Description:
+ * This function returns the CPU interrupt associated with an IRQ
+ *
+ * Input Parameters:
+ * irq - The IRQ associated with a CPU interrupt
+ * cpu - Pointer to store the CPU core of the CPU interrupt
+ *
+ * Returned Value:
+ * The CPU interrupt associated with such IRQ or IRQ_UNMAPPED if
+ * CPU interrupt is not mapped to an IRQ.
+ *
+ ****************************************************************************/
+
+int esp32s3_getcpuint_from_irq(int irq, int *cpu);
+
+/****************************************************************************
+ * Name: esp32s3_irq_noniram_disable
+ *
+ * Description:
+ * Disable interrupts that aren't specifically marked as running from IRAM
+ *
+ * Input Parameters:
+ * None
+ *
+ * Input Parameters:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32s3_irq_noniram_disable(void);
+
+/****************************************************************************
+ * Name: esp32s3_irq_noniram_enable
+ *
+ * Description:
+ * Re-enable interrupts disabled by esp32s3_irq_noniram_disable
+ *
+ * Input Parameters:
+ * None
+ *
+ * Input Parameters:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32s3_irq_noniram_enable(void);
+
+/****************************************************************************
+ * Name: esp32s3_irq_noniram_status
+ *
+ * Description:
+ * Get the current status of non-IRAM interrupts on a specific CPU core
+ *
+ * Input Parameters:
+ * cpu - The CPU to check the non-IRAM interrupts state
+ *
+ * Returned Value:
+ * true if non-IRAM interrupts are enabled, false otherwise.
+ *
+ ****************************************************************************/
+
+bool esp32s3_irq_noniram_status(int cpu);
+
+/****************************************************************************
+ * Name: esp32s3_irq_set_iram_isr
+ *
+ * Description:
+ * Set the ISR associated to an IRQ as a IRAM-enabled ISR.
+ *
+ * Input Parameters:
+ * irq - The associated IRQ to set
+ *
+ * Returned Value:
+ * OK on success; A negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int esp32s3_irq_set_iram_isr(int irq);
+
+/****************************************************************************
+ * Name: esp32s3_irq_unset_iram_isr
+ *
+ * Description:
+ * Set the ISR associated to an IRQ as a non-IRAM ISR.
+ *
+ * Input Parameters:
+ * irq - The associated IRQ to set
+ *
+ * Returned Value:
+ * OK on success; A negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int esp32s3_irq_unset_iram_isr(int irq);
+
+#ifdef CONFIG_ESP32S3_IRAM_ISR_DEBUG
+
+/****************************************************************************
+ * Name: esp32s3_get_iram_interrupt_records
+ *
+ * Description:
+ * This function copies the vector that keeps track of the IRQs that ran
+ * when non-IRAM interrupts were disabled.
+ *
+ * Input Parameters:
+ *
+ * irq_count - A previously allocated pointer to store the counter of the
+ * interrupts that ran when non-IRAM interrupts were disabled.
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32s3_get_iram_interrupt_records(uint64_t *irq_count);
Review Comment:
Where is it used?
##########
arch/xtensa/src/esp32s3/esp32s3_irq.c:
##########
@@ -785,6 +873,15 @@ int esp32s3_setup_irq(int cpu, int periphid, int priority,
int type)
intmap[cpuint] = CPUINT_ASSIGN(periphid + XTENSA_IRQ_FIRSTPERIPH);
g_irqmap[irq] = IRQ_MKMAP(cpu, cpuint);
+ if (flags & ESP32S3_CPUINT_FLAG_IRAM)
Review Comment:
Optional
```suggestion
if ((flags & ESP32S3_CPUINT_FLAG_IRAM) != 0)
```
##########
arch/xtensa/src/esp32s3/esp32s3_irq.c:
##########
@@ -965,6 +1094,189 @@ uint32_t *xtensa_int_decode(uint32_t cpuints, uint32_t
*regs)
}
}
+ UNUSED(cpu);
+
return regs;
}
+/****************************************************************************
+ * Name: esp32s3_irq_noniram_disable
+ *
+ * Description:
+ * Disable interrupts that aren't specifically marked as running from IRAM
+ *
+ * Input Parameters:
+ * None
+ *
+ * Input Parameters:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32s3_irq_noniram_disable(void)
+{
+ irqstate_t irqstate;
+ int cpu;
+ uint32_t oldint;
+ uint32_t non_iram_ints;
+
+ irqstate = enter_critical_section();
+ cpu = up_cpu_index();
+ non_iram_ints = g_non_iram_int_mask[cpu];
+ if (g_non_iram_int_disabled_flag[cpu])
+ {
+ PANIC();
+ }
Review Comment:
```suggestion
ASSERT(!g_non_iram_int_disabled_flag[cpu]);
```
##########
arch/xtensa/src/esp32s3/esp32s3_ble_adapter.c:
##########
@@ -896,7 +960,8 @@ static int IRAM_ATTR semphr_take_from_isr_wrapper(void
*semphr, void *hptw)
{
*(int *)hptw = 0;
- return esp_errno_trans(nxsem_trywait(semphr));
+ DEBUGPANIC();
Review Comment:
Ok.
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