pkarashchenko commented on code in PR #10854:
URL: https://github.com/apache/nuttx/pull/10854#discussion_r1346219819
##########
arch/xtensa/src/esp32s3/esp32s3_irq.c:
##########
@@ -965,6 +1094,189 @@ uint32_t *xtensa_int_decode(uint32_t cpuints, uint32_t
*regs)
}
}
+ UNUSED(cpu);
+
return regs;
}
+/****************************************************************************
+ * Name: esp32s3_irq_noniram_disable
+ *
+ * Description:
+ * Disable interrupts that aren't specifically marked as running from IRAM
+ *
+ * Input Parameters:
+ * None
+ *
+ * Input Parameters:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32s3_irq_noniram_disable(void)
+{
+ irqstate_t irqstate;
+ int cpu;
+ uint32_t oldint;
+ uint32_t non_iram_ints;
+
+ irqstate = enter_critical_section();
+ cpu = up_cpu_index();
+ non_iram_ints = g_non_iram_int_mask[cpu];
+ if (g_non_iram_int_disabled_flag[cpu])
+ {
+ PANIC();
+ }
+
+ g_non_iram_int_disabled_flag[cpu] = true;
+ oldint = g_intenable[cpu];
+
+ xtensa_disable_cpuint(&g_intenable[cpu], non_iram_ints);
+
+ g_non_iram_int_disabled[cpu] = oldint & non_iram_ints;
+
+ leave_critical_section(irqstate);
+}
+
+/****************************************************************************
+ * Name: esp32s3_irq_noniram_enable
+ *
+ * Description:
+ * Re-enable interrupts disabled by esp32s3_irq_noniram_disable
+ *
+ * Input Parameters:
+ * None
+ *
+ * Input Parameters:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32s3_irq_noniram_enable(void)
+{
+ irqstate_t irqstate;
+ int cpu;
+ uint32_t non_iram_ints;
+
+ irqstate = enter_critical_section();
+ cpu = up_cpu_index();
+ non_iram_ints = g_non_iram_int_disabled[cpu];
+ if (!g_non_iram_int_disabled_flag[cpu])
+ {
+ PANIC();
+ }
Review Comment:
Maybe just `ASSERT` in a single line
##########
arch/xtensa/src/esp32s3/esp32s3_irq.c:
##########
@@ -732,42 +811,51 @@ int esp32s3_cpuint_initialize(void)
*
* Description:
* This function sets up the IRQ. It allocates a CPU interrupt of the given
- * priority and type and attaches it to the given peripheral.
+ * priority and associated flags and attaches it to the given peripheral.
*
* Input Parameters:
* cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
* periphid - The peripheral number from irq.h to be assigned to
* a CPU interrupt.
* priority - Interrupt's priority (1 - 5).
- * type - Interrupt's type (level or edge).
+ * flags - An ORred mask of the ESP32S3_CPUINT_FLAG_* defines. These
+ * restrict the choice of interrupts that this routine can
+ * choose from.
*
* Returned Value:
* The allocated CPU interrupt on success, a negated errno value on
* failure.
*
****************************************************************************/
-int esp32s3_setup_irq(int cpu, int periphid, int priority, int type)
+int esp32s3_setup_irq(int cpu, int periphid, int priority, int flags)
{
irqstate_t irqstate;
uintptr_t regaddr;
uint8_t *intmap;
int irq;
int cpuint;
+ if (flags & ESP32S3_CPUINT_EDGE)
Review Comment:
Optional
```suggestion
if ((flags & ESP32S3_CPUINT_EDGE) != 0)
```
##########
arch/xtensa/src/esp32s3/esp32s3_ble_adapter.c:
##########
@@ -896,7 +960,8 @@ static int IRAM_ATTR semphr_take_from_isr_wrapper(void
*semphr, void *hptw)
{
*(int *)hptw = 0;
- return esp_errno_trans(nxsem_trywait(semphr));
+ DEBUGPANIC();
Review Comment:
Why change to panic here? I think we can trywait from ISR
##########
arch/xtensa/src/esp32s3/esp32s3_ble_adapter.c:
##########
@@ -717,7 +754,7 @@ static void interrupt_handler_set_wrapper(int intr_num,
void *fn, void *arg)
adapter->arg = arg;
ret = irq_attach(irq, esp_int_adpt_cb, adapter);
- DEBUGASSERT(ret == OK);
+ DEBUGVERIFY(ret);
Review Comment:
In general change is not needed because the actual call is done just above.
We can change it to put function call into `DEBUGVERIFY` and remove `ret`
varibale
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